This set of VLSI Multiple Choice Questions & Answers (MCQs) focuses on “Differential Amplifier”.
1. The difference output of the basic differential amplifier is taken at ___________
a) At X and ground
b) At Y and ground
c) Difference of the voltages at the gates of M1 and M2
d) Difference of the voltages between X and Y
View Answer
Explanation: None.
2. The Differential output of the difference amplifier is the amplification of __________
a) Difference between the voltages of input signals
b) Difference between the output of the each transistor
c) Difference between the supply and the output of the each transistor
d) All of the mentioned
View Answer
Explanation: None.
3. The inputs to the differential amplifier are applied at __________
a) At X and Y
b) At the gates of M1 and M2
c) All of the mentioned
d) None of the mentioned
View Answer
Explanation: None.
4. The Maximum and minimum output of the Differential amplifiers is defined as:
a) Vmax = VDD, Vmin = -VDD
b) Vmax = VDD, Vmin = Rd.Iss
c) Vmax = VDD, Vmin = VDD – Rd.Iss
d) None of the mentioned
View Answer
Explanation: None.
5. In Common Mode Differential Amplifier, the outputs Vout1 and Vout2 are related as:
a) Vout2 is in out of phase with Vout1 with same amplitude
b) Vout2 and Vout1 have same amplitude but the phase difference is 90 degrees
c) Vout1 and Vout2 have same amplitude and are in phase with each other and their respective inputs
d) Vout1 and Vout2 have same amplitude and are in phase with each other but out of phase with their respective inputs
View Answer
Explanation: None.
6. In a small signal differential gain vs input CM level graph, the gain decreases after V2 due to:
a) As the input voltage increases, the output will be clipped
b) When the input voltage to the transistors are high, the transistor enters saturation region and increases the current, which inturn decreases the output voltage = VDD – Rd.Iss
c) When Common Mode voltage is greater than or equal to V2, the input transistors enter triode region, the gain begins to fall
d) Increasing the input voltage beyond V2 causes the gate oxide to conduct and the gain is reduced
View Answer
Explanation: None.
Sanfoundry Global Education & Learning Series – VLSI.
To practice all areas of VLSI, here is complete set of 1000+ Multiple Choice Questions and Answers.