VLSI Questions and Answers – Inverter Delays

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This set of VLSI Multiple Choice Questions & Answers (MCQs) focuses on “Inverter Delays”.

1. The resistance value associated with Rp.u is
a) 2Rs
b) Rs
c) 4Rs
d) Rs/2
View Answer

Answer: c
Explanation: The resistance value associated with Rp.u. is 4Rs. Resistance is the measure of difficulty to pass an electric current through that material.
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2. The resistance value associated with Rp.d. is
a) 2Rs
b) Rs
c) 4Rs
d) Rs/2
View Answer

Answer: b
Explanation: The resistance value associated with Rp.d. is 1Rs. This is the measure of difficulty to pass current through the pull-down device.

3. The overall delay of nMOS inverter pair is
a) 4Ʈ
b) Ʈ
c) 5Ʈ
d) 2Ʈ
View Answer

Answer: c
Explanation: The overall delay of nMOS inverter pair is Ʈ+4Ʈ = 5Ʈ. This delay is the time taken for the input signal to get inverted and arrive at the output.

4. The inverter pair delay for inverters having 4:1 ratio is
a) 4Ʈ
b) Ʈ
c) 5Ʈ
d) 2Ʈ
View Answer

Answer: c
Explanation: The inverter pair delay for inverters having 4:1 ratio is 5Ʈ. This measure of delay is for two inverters, in which the output of the first is given as the input for the second inverter.

5. The assymetry of resistance value can be eliminated by
a) decreasing the width
b) increasing the width
c) increasing the length
d) increasing the width
View Answer

Answer: b
Explanation: The assymetry of resistance value can be eliminated by increasing the width of the p-device channel.
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6. The ratio of rise time to fall time can be equated to
a) βn/βp
b) βp/βn
c) βp*βn
d) βp/2βn
View Answer

Answer: a
Explanation: The ratio of rise time to fall time can be equated to βn/βp. Rise time is the time taken by a signal to change from a specified low value to a specified high value. Fall time is the time taken for the amplitude of a pulse to decrease from a specified value to another specified value.

7. The value µn is equal to
a) µp
b) 0.5µp
c) 1.5µp
d) 2.5µp
View Answer

Answer: d
Explanation: The value of µn = 2.5 µp. This shows that µn value is greater than that of the µp.

8. Which quantity is slower?
a) rise time
b) fall time
c) all of the mentioned
d) none of the mentioned
View Answer

Answer: a
Explanation: Rise time is slower by a factor of 2.5 than fall time.

9. Condition for achieving symmetrical operation is
a) Wp = Wn
b) Wp greater than Wn
c) Wp lesser than Wn
d) Wp lesser than 2Wn
View Answer

Answer: b
Explanation: The condition for achieving symmetrical operation is Wp = 2.5 Wn.
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10. Rise time and fall time is _____ to load capacitance CL
a) directly proportional
b) inversely proportonal
c) exponentially equal
d) not related
View Answer

Answer: a
Explanation: Rise time and fall time is directly proportional to load capacitance CL.

11. Rise time and fall time is ________ to Vdd
a) directly proportional
b) inversely proportonal
c) exponentially equal
d) not related
View Answer

Answer: b
Explanation: Rise time and fall time is inversely proportional to Vdd. This shows that if Vdd is reduced fall time and rise time increases.

Sanfoundry Global Education & Learning Series – VLSI.
To practice all areas of VLSI, here is complete set of 1000+ Multiple Choice Questions and Answers.

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Manish Bhojasia, a technology veteran with 20+ years @ Cisco & Wipro, is Founder and CTO at Sanfoundry. He is Linux Kernel Developer & SAN Architect and is passionate about competency developments in these areas. He lives in Bangalore and delivers focused training sessions to IT professionals in Linux Kernel, Linux Debugging, Linux Device Drivers, Linux Networking, Linux Storage, Advanced C Programming, SAN Storage Technologies, SCSI Internals & Storage Protocols such as iSCSI & Fiber Channel. Stay connected with him @ LinkedIn