This set of VLSI Multiple Choice Questions & Answers (MCQs) focuses on “Propagation Delays”.
1. Propagation time is directly proportional to ____________
Explanation: Propagation time is directly proportional to square of the Propagation distance (x2). It is the time taken by the signal to move from input port to output port.
2. The total resistance can be given as ___________
Explanation: The total resistance can be given as the product of nrRs where r is the relative resistance per section in terms of Rs.
3. Total capacitance can be given as ___________
a) n(square Cg)
b) nc(square Cg)
c) c(square Cg)
d) square Cg
Explanation: Total capacitance can be given as the product of nc(square Cg) where c is the relative capacitance per section in terms of square Cg.
4. Overall delay is directly proportional to ___________
Explanation: The overall delay is directly proportional to n2, where n is the number of pass transistors in series.
5. The number of pass transistors connected in series can be increased if ___________
a) compressor is connected
b) buffer is connected
c) ground is connected
d) voltage regulator is connected
Explanation: The number of pass transistors connected in series can be increased by connecting buffer in between.
6. Buffer is used because ___________
a) it increases the speed
b) decreases sensitivity to noise
c) decreases speed
d) does not affect speed
Explanation: Buffer is used for long polysilicon runs because it increases the speed and reduces the sensitivity to noise.
7. The overall delay is ______ to the relative resistance r.
a) directly proportional
b) inversely proportional
c) exponentially proportional
d) not dependent
Explanation: The overall delay is directly proportional to the relative resistance r. Overall delay is given as product of n^2rcƮ.
8. Small disturbances of noise ___________
a) decreases the inverter voltage
b) increases the output voltage
c) switches the inverter stage between 0 to 1
d) does not switch the stage and keeps it stable
Explanation: Small disturbances of noise switches the inverter stage between 0 and 1 or vice versa. It disturbs the normal operation or behaviour.
9. The buffer speeds up the ___________
a) rise time
b) fall time
c) all of the mentioned
d) none of the mentioned
Explanation: The buffer speeds up the rise time of propogated signal edge. A buffer is the combination of two inverters in which one output is fed to the other as the input.
10. Overall delay increases as n ___________
c) exponentially decreases
d) logarithmically decreases
Explanation: Overall delay increases as n increases where n is the number of pass transistors connected in series.
Sanfoundry Global Education & Learning Series – VLSI.
To practice all areas of VLSI, here is complete set of 1000+ Multiple Choice Questions and Answers.
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