This set of VLSI Multiple Choice Questions & Answers (MCQs) focuses on “CMOS Inverter”.
1. CMOS inverter has ______ regions of operation
Explanation: CMOS inverter has five distint regions of operation which can be determined by plotting CMOS inverter current versus Vin.
2. If n-transistor conducts and has large voltage between source and drain, then it is said to be in _____ region
c) non saturation
Explanation: If n-transistor conducts and has large voltage between source and drain, then it is in saturation.
3. If p-transistor is conducting and has small voltage between source and drain, then the it is said to work in
a) linear region
b) saturation region
c) non saturation resistive region
d) cut-off region
Explanation: If p-transistor is conducting and has small voltage between source and drain, then it is said to be in unsaturated resistive region.
4. In the region where inverter exhibits gain, the two transistors are in _______ region
c) non saturation
Explanation: In the region where the inverter exhibits gain, the two transistors n and p operates in saturation region.
5. If both the transistors are in saturation, then they act as
a) current source
b) voltage source
Explanation: When both the transistors are in saturation, then act as current sources so that the equivalent circuit is two current sources between Vdd and Vss.
6. If βn = βp, then Vin is equal to
Explanation: If βn = βp, then Vin = 0.5Vdd which implies that the changeover between logic levels is symmetrically disposed about the point.
7. Mobility depends on
a) transverse electric field
d) Channel length
Explanation: Mobility is affected by transverse electric field and thus also depends on Vgs and the mobility of p-device and n-device are inherently unequal.
8. In CMOS inverter, transistor is a switch having
a) infinite on resistance
b) finite off resistance
d) infinite off resistance
Explanation: In CMOS inverter, transistor is a awitch having finite on resistance and infinite off resistance.
9. CMOS inverter has ______ output impedance
Explanation: CMOS inverter has low output impedance and this makes it less prone to noise and disturbance.
10. Input resistance of CMOS inverter is
Explanation: Input resistance of CMOS inverter is extremely high as it is a perfect insulator and draws no dc input source.
11. Increasing fan-out, ______ the propogation delay
c) does not affect
d) exponentially decreases
Explanation: In CMOS inverter, increasing the fan-out also increases the propogation delay. Fan-out is a term that defines the maximum number of digital inputs that the output of a single logic gate can feed.
12. Fast gate can be built by keeping
a) low output capacitance
b) high on resistance
c) high output capacitance
d) input capacitance does not affect speed of the gate
Explanation: Fast gate can be built by keeping the output capacitance small and by decreasing the on resistance of the transistor.
Sanfoundry Global Education & Learning Series – VLSI.
To practice all areas of VLSI, here is complete set of 1000+ Multiple Choice Questions and Answers.