VLSI Questions and Answers – Floor Layout

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This set of VLSI Multiple Choice Questions & Answers (MCQs) focuses on “Floor Layout”.

1. A 4-bit processor has two buses which are
a) unidirectional
b) bidirectional
c) one unidirectional and one bidirectional
d) more than two buses
View Answer

Answer: c
Explanation: A 4-bit processor has two buses one is bidirectional to carry operand and output to shifter and register array and another bus unidirectional to carry input.
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2. The IN and OUT bus lines relative positions are interchanged to
a) match height
b) match length
c) match width
d) match thickness
View Answer

Answer: a
Explanation: The IN and OUT bus line’s relative positions are interchanged to make the cell stretchable and to match the height of the block and spacings.

3. The IN and OUT bus lines should be in
a) metal
b) polysilicon
c) diffusion
d) silicon
View Answer

Answer: a
Explanation: The IN and OUT bus lines should be in metal rather than diffusion or polysilicon to mate with the bus structures of other blocks.

4. Extensions are
a) vertical
b) horizontal
c) diagonal
d) happazard
View Answer

Answer: b
Explanation: Extensions are horizontal or parallel to the stratified unit and rifts are described as extension zones.

5. Rifts and extensions should be placed in
a) minimum amount of geometry
b) maximum amount of geometry
c) in slopes
d) anywhere in the layout
View Answer

Answer: a
Explanation: Rifts and extensions should be placed where they cut a minimum amount of simple geometry, one in polysilicon and one in diffusion.
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6. Rifts are used for smooth flow through buses.
a) true
b) false
View Answer

Answer: a
Explanation: Rifts are used for smooth flow through buses as suggested and hence one in used in polysilicon and other in diffusion.

7. Input and output pads are made up of
a) polysilicon
b) metal
c) silicon
d) carbon
View Answer

Answer: b
Explanation: Input and output pads are made up of metal and it used to connect chips from one circuitry to another.

8. Bonding pads are placed
a) in the chip
b) exactly at the centre of chip
c) edge of the chip
d) above the chip
View Answer

Answer: c
Explanation: Bonding pads are positioned near to the edge of the chips although there will be a Vdd bus between bonding pads and chip boundary.

9. Which pad contains Schmitt trigger circuitry?
a) Vdd pads
b) Vss pads
c) input pads
d) output pads
View Answer

Answer: c
Explanation: Input pad contains over voltage protection features and also contains inverting circuitry or Schmitt trigger circuitry.
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10. Which occupies lesser area?
a) Vdd pads
b) Vss pads
c) input pads
d) output pads
View Answer

Answer: d
Explanation: Output pads provide large current for off-wiring and also inputs to other devices. But these pads uses minimum space.

11. Buffers are needed to drive
a) small capacitance
b) large capacitance
c) small resistance
d) large resistance
View Answer

Answer: b
Explanation: Buffers are necessary in environments on and off chip. It is used to drive relatively large capacitances associated with circuits off the chip.

12. Pads must be placed generally in the periphery of the chip area.
a) true
b) false
View Answer

Answer: a
Explanation: Usually pads must be placed in the periphery of the chip area otherwise bonding difficulties may be encountered.

13. How much area should be allocated for pads?
a) one third
b) two third
c) half
d) three fourth
View Answer

Answer: a
Explanation: According to a thumb rule, the small system designer should allow one third of the chip area for pads.
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Sanfoundry Global Education & Learning Series – VLSI.
To practice all areas of VLSI, here is complete set of 1000+ Multiple Choice Questions and Answers.

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Manish Bhojasia, a technology veteran with 20+ years @ Cisco & Wipro, is Founder and CTO at Sanfoundry. He is Linux Kernel Developer & SAN Architect and is passionate about competency developments in these areas. He lives in Bangalore and delivers focused training sessions to IT professionals in Linux Kernel, Linux Debugging, Linux Device Drivers, Linux Networking, Linux Storage, Advanced C Programming, SAN Storage Technologies, SCSI Internals & Storage Protocols such as iSCSI & Fiber Channel. Stay connected with him @ LinkedIn