This set of VLSI Mcqs focuses on “Guidelines for Testability -3”.
1. Counters are
a) sequential circuits
b) synchrnous circuits
c) asynchronous circuits
d) buffer circuits
Explanation: Counters are sequential circuits and need a large number of input vectors to be fully tested.
2. Wrong readings are recorded due to reset input being
a) dependent of clock signal
b) independent of clock signal
c) dependent of gate signal
d) independent of gate signal
Explanation: Since reset input is independent of system clock signal, erroneous readings are being read by the tester.
3. To avoid self resetting, the tester can be over riden by adding
a) an AND gate
b) an OR gate
c) an EX-OR gate
d) shift registers
Explanation: Self resetting can be avoided by adding an OR gate which over rides the tester.
4. Partitioning technique is not suitable for micro processor like circuits.
Explanation: Partitioning technique is very widely used for microprocessor like circuits and using bus structures is related to partitioning technique.
5. The fast rise and fall times give cross-talk problems if
a) they are in close proximity
b) if they are far away
c) it always gives rise to croo-talk problems
d) does not allow croo-talk problems
Explanation: The fast rise and fall times of digital signals can give rise to croo-talk problems in analog signal lines if they are in close proximity.
6. To route digital signals near analog signals, _______ must be done
b) shielding digital signals
c) balancing and shielding
Explanation: To route digital signals near analog signals, balancing and shielding of digital signals must be done.
7. To access directly another system, ______ is done
Explanation: To directly access another sub-system to be tested from one subsystem, by-passing must be performed.
8. With partitioning, bypassing is performed using
Explanation: With partitioning, to directly access a sub-system for testing, bypassing must be done and this is achieved using multiplexers.
9. Bypassing technique works well with
d) all of the mentioned
Explanation: Bypassing technique works well with counters, dividers, RAM, ROM, PLAs, sequential blocks, analog circuits and internal clocks.
10. In the bypassing approach, subsystem can be tested
Explanation: In the bypassing approach, subsystem can be tested exhaustively by controlling the multiplexers based interconnections in the system.
Sanfoundry Global Education & Learning Series – VLSI.
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