This set of VLSI Multiple Choice Questions & Answers (MCQs) focuses on “Metal Oxide Semiconductor (MOS) Transistor – 1”.
1. The conductivity of the pure silicon is raised by:
a) Introducing Dopants (impurities)
b) Increasing Pressure
c) Decreasing Temperature
d) Deformation of Lattice
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Explanation: By introducing Dopants free charge carriers increase further increasing the conductivity of silicon.
2. The n-type semiconductor have _______ as majority carriers.
a) Holes
b) Negative ions
c) Electrons
d) Positive ions
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Explanation: In n-type semiconductor the majority charge carriers present are electrons.
3. The majority carriers of p-type semiconductor are:
a) Holes
b) Negative ions
c) Electrons
d) Positive ions
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Explanation: The majority charge carriers of n-type semiconductors are holes.
4. The n-MOS transistor is made up of:
a) N-type source, n-type drain and p-type bulk
b) N-type source, p-type drain and p-type bulk
c) P-type source, n-type drain and n-type bulk
d) P- type source, p-type drain and n-type bulk
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Explanation: n-MOS Transistor consists of n-type source, n-type drain and p-type bulk.
5. The correct representation of n-MOSFET is:
a)
b)
c)
d) None of the mentioned
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6. The correct representation of p-MOSFET is:
a)
b)
c)
d)
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7. The oxide layer formed in the MOSFET is:
a) Metal oxide
b) Silicon dioxide
c) Poly Silicon oxide
d) Oxides of Non metals
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Explanation: Silicon Dioxide (Commonly called as glass) is the insulating oxide layer formed in MOSFET.
8. The drain current is varied by:
a) Gate to source voltage
b) Gate current
c) Source Voltage
d) None of the mentioned
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Explanation: The Gate to Source voltage acts as input which varies the drain current.
9. The low voltage on the gate of p-MOSFET forms:
a) Channel of negative carriers
b) Channel is not formed
c) Channel is clipped
d) Channel of positive carriers
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Explanation: For a p-MOS low gate voltage forms a conducting channel of positive carriers.
10. The n-MOSFET is working as accumulation mode when:
a) Gate is applied with positive voltage
b) Gate is grounded
c) Gate is applied with negative voltage
d) Gate is connected to source
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Explanation: When the negative voltage is applied to the gate, there develops a presence of negative charge on the gate. The mobile positively charged holes are attracted to the region beneath the gate. This explains the formation of accumulation mode.
Sanfoundry Global Education & Learning Series – VLSI.
To practice all areas of VLSI, here is complete set of 1000+ Multiple Choice Questions and Answers.