VLSI Questions and Answers – Metal Oxide Semiconductor (MOS) Transistor – 2

This set of VLSI Multiple Choice Questions & Answers (MCQs) focuses on “Metal Oxide Semiconductor (MOS) Transistor – 2”.

1. The current through the n-MOS transistor will flow when:
a) Vgs > Vtreshold, Vds=0
b) Vgd < Vtreshold, Vds=0
c) Vgs > Vtreshold, Vds>0
d) Vgd > Vtreshold, Vds<0
View Answer

Answer: c
Explanation: The current flows through the n-MOS transistor when Vgs > Vtreshold, Vds>0.

2. The p-MOS Transistor is said to be in Saturation mode when:
a) Vdsp > Vgsp – Vtp
b) Vgsp < Vdsp –Vtp
c) Vgsp > Vtp
d) Vdsp < Vgsp – Vtp
View Answer

Answer: d
Explanation: The pMOS transistor is in Saturation mode when Vdsp < Vgsp – Vtp and Vgsp < Vtp.

3. The Fermi potential of the p-type MOSFET is:
a) φfp = (kT/q)ln(ND/NA)
b) φfp = (kT/q)ln(NA/ND)
c) φfp = (kT/q)ln(NA/ni)
d) φfp = (kT/q)ln(ni/NA)
View Answer

Answer: d
Explanation: The Fermi potential of the p-type semiconductor is φfp = (kT/q)ln(ni/NA) where ni denotes the intrinsic carrier concentration of silicon, NA is acceptor concentration, ND is Donor Concentration.
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4. The Fermi potential(φfp) for the n-type MOSFET is:
a) φfp = (kT/q)ln(ND/NA)
b) φfp = (kT/q)ln(NA/ND)
c) φfp = (kT/q)ln(ND/ni)
d) φfp = (kT/q)ln(ni/ND)
View Answer

Answer: c
Explanation: The Fermi potential of the p-type semiconductor is φfp = (kT/q)ln(ND/ni) where ni denotes the intrinsic carrier concentration of silicon, NA is acceptor concentration, ND is Donor Concentration.

5. The principle of the MOSFET operation is:
a) Control the conduction of current between the source and the drain, using the potential difference applied at the gate voltage as a control variable
b) Control the current conduction between the source and the gate, using the electric field applied at the drain voltage as a control variable
c) Control the current conduction between the PN junction, using the electric field generated by the bias voltage as a control variable
d) Control the current conduction between the PN junctions, using the electric potential generated by the gate voltage as a control variable
View Answer

Answer:a
Explanation: By varying the gate voltage the current between the source and drain are varied.
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6. The conduction of current IDS depends on:

i) Gate to source voltage
ii) Drain to source voltage
iii) Bulk to source voltage
iv) Threshold voltage
v) Dimensions of MOSFET

a) Only i
b) Only i, ii and iii
c) Only v
d) All of the mentioned
View Answer

Answer: d
Explanation: The current depends on Vgs, Vds, Vbs, Vt and dimensions of MOSFET.
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7. The impedance at the input of n-MOS transistor circuit is:
a) Lesser than p-MOS transistor
b) Greater than BJT transistor
c) Lesser than JFET transistor
d) Zero
View Answer

Answer: b
Explanation: The impedance at the input of n-MOS transistor is more than BJT transistor.

8. The depletion mode n-MOS differs from enhancement mode n-MOS in:
a) Threshold voltage
b) Channel Length
c) Switching time
d) None of the mentioned
View Answer

Answer: a
Explanation: If n-MOS operates with negative threshold voltage then it is in depletion mode. If n-MOS operates with positive threshold voltage then it is in enhancement mode.
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Sanfoundry Global Education & Learning Series – VLSI.

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Manish Bhojasia - Founder & CTO at Sanfoundry
Manish Bhojasia, a technology veteran with 20+ years @ Cisco & Wipro, is Founder and CTO at Sanfoundry. He lives in Bangalore, and focuses on development of Linux Kernel, SAN Technologies, Advanced C, Data Structures & Alogrithms. Stay connected with him at LinkedIn.

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