Microprocessors Questions and Answers – Interrupt Cycle of 8086/8088

This set of Microprocessor Multiple Choice Questions & Answers (MCQs) focuses on “Interrupt Cycle of 8086/8088”.

1. If an interrupt is generated from outside the processor then it is an
a) internal interrupt
b) external interrupt
c) interrupt
d) none of the mentioned
View Answer

Answer: b
Explanation: If an external device or a signal interrupts the processor from outside then it is an external interrupt.

2. If the interrupt is generated by the execution of an interrupt instruction then it is
a) internal interrupt
b) external interrupt
c) interrupt-in-interrupt
d) none of the mentioned
View Answer

Answer: a
Explanation: The internal interrupt is generated internally by the processor circuit or by the execution of an interrupt instruction.

3. Example of an external interrupt is
a) divide by zero interrupt
b) keyboard interrupt
c) overflow interrupt
d) type2 interrupt
View Answer

Answer: b
Explanation: Since the keyboard is external to the processor, it is an external interrupt.
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4. Example of an internal interrupt is
a) divide by zero interrupt
b) overflow interrupt
c) interrupt due to INT
d) all of the mentioned
View Answer

Answer: d
Explanation: Since the interrupts occur within the processor itself, they are called internal interrupts.

5. The interrupt request that is independent of IF flag is
a) NMI
b) TRAP
c) Divide by zero
d) All of the mentioned
View Answer

Answer: d
Explanation: These requests are independent of IF flag.
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6. The type of the interrupt may be passed to the interrupt structure of CPU from
a) interrupt service routine
b) stack
c) interrupt controller
d) none of the mentioned
View Answer

Answer: c
Explanation: After an interrupt is acknowledged, the CPU computes the vector address from the type of the interrupt that may be passed to the internal structure of the CPU from an interrupt controller in case of external interrupts.

7. During the execution of an interrupt, the data pushed into the stack is the content of
a) IP
b) CS
c) PSW
d) All of the mentioned
View Answer

Answer: d
Explanation: The contents of IP, CS and PSW are pushed into the stack during the execution.
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8. After every response to the single step interrupt the flag that is cleared is
a) IF (Interrupt Flag)
b) TF (Trap Flag)
c) OF (Overflow Flag)
d) None of the mentioned
View Answer

Answer: b
Explanation: If the trap flag is set then the processor enters the single step execution mode. After the execution, the trap flag is cleared.

9. At the end of ISR, the instruction should be
a) END
b) ENDS
c) IRET
d) INTR
View Answer

Answer: c
Explanation: After the execution of the ISR, the control must go to the previous program (maybe main program) which was being executed. To execute it, IRET is placed at the end of ISR.
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10. When the CPU executes IRET,
a) contents of IP and CS are retrieved
b) the control transfers from ISR to main program
c) clears the trap flag
d) clears the interrupt flag
View Answer

Answer: a
Explanation: When the instruction IRET is executed, the contents of flags, IP and CS which were saved at the stack by the CALL instruction are retrieved to the respective registers.

Sanfoundry Global Education & Learning Series – Microprocessors.

Here’s the list of Best Books in Microprocessors.

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Manish Bhojasia, a technology veteran with 20+ years @ Cisco & Wipro, is Founder and CTO at Sanfoundry. He lives in Bangalore, and focuses on development of Linux Kernel, SAN Technologies, Advanced C, Data Structures & Alogrithms. Stay connected with him at LinkedIn.

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