Microprocessors Questions and Answers – 8051 Instruction Set -1

This set of Microprocessor Multiple Choice Questions & Answers (MCQs) focuses on “8051 Instruction Set -1”.

1. Which of the following is not an instruction of 8051 instructions?
a) arithmetic instructions
b) boolean instructions
c) logical instructions
d) none
View Answer

Answer: d
Explanation: The 8051 instructions are categorized as
1. Data transfer instructions
2. Arithmetic instructions
3. Logical instructions
4. Boolean instructions
5. Control transfer instructions.

2. The operations performed by data transfer instructions are on
a) bit data
b) byte data
c) 16-bit data
d) all of the mentioned
View Answer

Answer: d
Explanation: The data transfer instructions implement a bit, byte, 16-bit data transfer operations between the SRC(source) and DST(destination) operands.

3. Which of the following is true while executing data transfer instructions?
a) program counter is not accessible
b) restricted bit-transfer operations are allowed
c) both operands can be direct/indirect register operands
d) all of the mentioned
View Answer

Answer: c
Explanation: In data transfer instructions,
1. Program counter is not accessible.
2. Restricted bit-transfer operations are allowed.
3. Both operands can be direct/indirect register operands.
4. BOth operands can be internal direct data memory operands.
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4. The logical instruction that affects the carry flag during its execution is
a) XRL A;
b) ANL A;
c) ORL A;
d) RLC A;
View Answer

Answer: d
Explanation: The logical instructions that doesn’t affect the carry flag are, ANL, ORL and XRL. The logical instructions that affect the carry flag during its execution are RL, RLC, RRC and RR.

5. The instruction that is used to complement or invert the bit of a bit addressable SFR is
a) CLR C
b) CPL C
c) CPL Bit
d) ANL Bit
View Answer

Answer: c
Explanation: The instruction, CPL Bit is used to complement or invert the bit of a bit addressable SFR or RAM.
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6. The instructions that change the sequence of execution are
a) conditional instructions
b) logical instructions
c) control transfer instructions
d) data transfer instructions
View Answer

Answer: c
Explanation: The control transfer instructions transfer the control of execution or change the sequence of execution conditionally or unconditionally.

7. The control transfer instructions are divided into
a) explicit and implicit control transfer instructions
b) conditional and unconditional control transfer instructions
c) auto control and self control transfer instructions
d) all of the mentioned
View Answer

Answer: b
Explanation: The control transfer instructions are divided into conditional and unconditional control transfer instructions.
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8. The conditional control transfer instructions check a bit condition which includes any bit of
a) bit addressable RAM
b) bit addressable SFRs
c) content of accumulator
d) all of the mentioned
View Answer

Answer: d
Explanation: The conditional control transfer instructions check a bit condition which includes any bit of bit addressable RAM or bit addressable SFRs or content of accumulator for transferring the control to the specified jump location.

9. All conditional jumps are
a) absolute jumps
b) long jumps
c) short jumps
d) none
View Answer

Answer: c
Explanation: All conditional jumps are short jumps.
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10. The first byte of a short jump instruction represents
a) opcode byte
b) relative address
c) opcode field
d) none
View Answer

Answer: a
Explanation: The short jump instruction has two byte instruction. The first byte represents opcode byte and second byte represents an 8-bit relative address.

11. In logical instructions, the immediate data can be an operand for
a) increment operation
b) decrement operation
c) single operand instruction
d) none
View Answer

Answer: d
Explanation: In logical instructions, the immediate data can’t be an operand for increment/decrement or any other single operand instruction.

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Manish Bhojasia, a technology veteran with 20+ years @ Cisco & Wipro, is Founder and CTO at Sanfoundry. He lives in Bangalore, and focuses on development of Linux Kernel, SAN Technologies, Advanced C, Data Structures & Alogrithms. Stay connected with him at LinkedIn.

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