logo
  • Home
  • Test & Rank
  • About
  • Training
  • Programming
  • CS
  • IT
  • IS
  • ECE
  • EEE
  • EE
  • Civil
  • Mechanical
  • Chemical
  • Metallurgy
  • Instrumentation
  • Aeronautical
  • Aerospace
  • Biotechnology
  • Mining
  • Marine
  • Agriculture
  • MCA
  • BCA
  • Internship
  • Jobs
  • Contact

Microprocessors Multiple Choice Questions | MCQs | Quiz

Microprocessor Interview Questions and Answers
Practice Microprocessor questions and answers for interviews, campus placements, online tests, aptitude tests, quizzes and competitive exams.

Get Started

•   Machine Language Formats
•   8086 Addressing Modes
•   8086/8088 Instruction Set-1
•   8086/8088 Instruction Set-2
•   8086/8088 Instruction Set-3
•   Assembler Directives
•   Instructions Do's & Don'ts
•   Assembler Programming
•   Stack
•   8086/8088 Stack Structure
•   Interrupt Service Routines
•   8086/8088 Interrupt Cycle
•   Non Maskable Interrupt
•   Interrupt Programming
•   Macros
•   Timings & Delays
•   Semiconductor Interfacing
•   Dynamic RAM Interfacing
•   Interfacing I/O Ports
•   PIO 8255
•   8255 Operation Modes
•   Analog - Digital Converters
•   Stepper Motor Interfacing
•   8254 Interval Timer
•   8259A Interrupt Controller
•   8279 Keyboard Controller
•   8251 USART
•   8257 DMA Controller
•   DMA Transfer & Operations
•   8237 DMA Interface - 1
•   8237 DMA Interface - 2
•   High Storage Capacity
•   Interconnection Topologies
•   Software Aspects
•   Numeric Processor 8087 - 1
•   Numeric Processor 8087 - 2
•   8089 I/O Processor
•   Bus Arbitration & Control
•   Tightly Coupled Systems
•   Multi Microprocessor
•   80286 Salient Features
•   80286 Internal Architecture
•   80286 Signal Descriptions
•   Real Addressing Mode
•   PVAM - 1
•   PVAM - 2
•   Privilege
•   Protection
•   Special Operations
•   80286 System Configuration
•   Bus Hold & HLDA
•   Instruction Set Features - 1
•   Instruction Set Features - 2
•   80287 Math Coprocessor-1
•   80287 Math Coprocessor-2
•   80386DX Salient Features
•   ↓ 80386 ↓
•   Architecture & Signals
•   Register Organisation - 1
•   Register Organisation - 2
•   80386 Data Types
•   80386 Real Address Mode
•   Segmentation
•   Paging
•   80387 Coprocessor
•   80386 Instruction Set
•   80486DX Coprocessor
•   80586 (Pentium) Features
•   System Architecture
•   Intel MMX Architecture
•   MMX Data Types
•   MMX Instruction Set
•   Pentium-Pro & Pentium2 - 1
•   Pentium-Pro & Pentium2 - 2
•   Pentium 4 Features - 1
•   Pentium 4 Features - 2
•   Hyperthreading Technology
•   Pentium Hyperthreading
•   Formal Verification
•   Hybrid Architecture - 1
•   Hybrid Architecture - 2
•   8051 Architecture
•   8051 Register Set
•   8051 Interrupt & Stack - 1
•   8051 Interrupt & Stack - 2
•   8051 Addressing Modes
•   8051 Instruction Set - 1
•   8051 Instruction Set - 2
•   8051 Ports Interfacing - 1
•   8051 Ports Interfacing - 2
•   8051 Interrupt Structure
•   Serial Communication Unit
•   Power Control Register

Best Reference Books

Microprocessor Books

Microprocessor Tests

Certification Test
Internship Test
Job Test
All Tests
Top Rankers
Practice Test 1
Practice Test 2
Practice Test 3
Practice Test 4
Practice Test 5
Practice Test 6
Practice Test 7
Practice Test 8
Practice Test 9
Practice Test 10
Mock Test 1
Mock Test 2
Mock Test 3
Mock Test 4
Mock Test 5
Mock Test 6
Mock Test 7
Mock Test 8
Mock Test 9
Mock Test 10
« Prev Page
Next Page »

Microprocessors Questions and Answers – Privilege

Posted on March 18, 2014 by Manish

This set of Microprocessor Multiple Choice Questions & Answers (MCQs) focuses on “Privilege”.

1. By using privilege mechanism the protection from unauthorized accesses is done to
a) operating system
b) interrupt handlers
c) system software
d) all of the mentioned
View Answer

Answer: d
Explanation: The operating system, interrupt handlers and other system softwares can be protected from unauthorized accesses in virtual address space of each task using the privilege mechanism.
advertisement

2. The task privilege level at the instant of execution is called
a) Descriptor privilege level (DPL)
b) Current privilege level (CPL)
c) Effective privilege level (EPL)
d) None of the mentioned
View Answer

Answer: b
Explanation: Any one of the four privilege levels may be used to execute a task. The task privilege level at that instant is called the Current Privilege Level (CPL).

3. Once the CPL is selected, it can be changed by
a) hold
b) transferring control using system descriptors
c) transferring control using gate descriptors
d) transferring control using interrupt descriptors
View Answer

Answer: c
Explanation: Once the CPL is selected, it cannot be changed during the execution normally in a single code segment. It can only be changed by transferring the control, using gate descriptors, to a new segment.

4. The data segments defined in GDT (global descriptor table) and the LDT (local descriptor table) can be accessed by a task with
a) privilege level 0
b) privilege level 1
c) privilege level 2
d) privilege level 3
View Answer

Answer: a
Explanation: A task executing at level 0, the most privileged level, can access all the data segments defined in GDT and the LDT of the task.

5. A task with privilege level 0, doesn’t refer to all the lower level privilege descriptors in
a) GDT (global descriptor table)
b) LDT (local descriptor table)
c) IDT (interrupt descriptor table)
d) None of the mentioned
View Answer

Answer: b
Explanation: The task with privilege level 0, refers to all the lower level privilege descriptors which apply to all the descriptors except the LDT descriptors.

6. The selector RPL that uses a less trusted privilege than the current privilege level for further use is known as
a) Least task privilege level
b) Descriptor privilege level
c) Effective privilege level
d) None of the mentioned
View Answer

Answer: c
Explanation: A selector RPL uses a less trusted privilege than the current privilege level for further use. This is known as the Effective Privilege Level of the task.
advertisement

7. The effective privilege level is
a) maximum numeric of RPL and CPL
b) minimum privilege of RPL and CPL
c) numeric minimum and privilege maximum of RPL and CPL
d) none of the mentioned
View Answer

Answer: c
Explanation: The effective privilege level is minimum in numeric and maximum in the privilege of RPL and CPL.

8. The task requesting an access to a descriptor is allowed to access after checking the
a) type of descriptor
b) privilege level
c) type of descriptor and privilege level
d) corresponding segment
View Answer

Answer: c
Explanation: The task requesting an access to a descriptor is allowed to access to it and to the corresponding segment, only after checking the type of the descriptor and privilege level(CPL, RPL, DPL).

9. A CALL instruction can reference only a code segment descriptor with
a) DPL less privilege than CPL
b) DPL equal privilege to CPL
c) DPL greater privilege than CPL
d) All of the mentioned
View Answer

Answer: b
Explanation: A CALL or JUMP instruction can reference only a code segment descriptor with DPL equal to CPL of the task or a segment with a DPL of equal or greater privilege than CPL.

10. The RPL of a selector that referred to the code descriptor must have
a) less privilege than CPL
b) greater privilege than CPL
c) equal privilege than CPL
d) any privilege regarding CPL
View Answer

Answer: c
Explanation: The RPL of a selector that referred to the code descriptor must have the same privilege as CPL.

11. The instruction that refers to only code segment descriptors with DPL equal to or less than the task CPL is
a) CALL
b) IRET
c) ESC
d) RET and IRET
View Answer

Answer: d
Explanation: The RET and IRET instructions are to refer to only code segment descriptors with DPL equal to or less than the task CPL.

12. When a JUMP instruction references a Task State Segment(TSS) descriptor, then DPL must be
a) equally privileged as CPL
b) greater or equally privileged than CPL
c) less or equally privileged than CPL
d) less privileged than CPL
View Answer

Answer: c
Explanation: When a CALL or JUMP instruction references a Task State Segment(TSS) descriptor, then DPL must be less or equally privileged than CPL.
advertisement

13. The data segment access refers to
a) loading DS
b) loading ES
c) loading SS
d) all of the mentioned
View Answer

Answer: d
Explanation: Loading DS, ES or SS for referring to a new descriptor comes under the data segment access.

14. An exception is generated when
a) privilege test is negative
b) an improper segment is referenced
c) referenced segment is not present in physical memory
d) all of the mentioned
View Answer

Answer: d
Explanation: If the privilege test is negative or an improper segment is referenced then an exception 13 is generated. If the referenced segment is not present in physical memory, an exception 11 is generated.

Sanfoundry Global Education & Learning Series – Microprocessors.

Here’s the list of Best Reference Books in Microprocessors.

To practice all areas of Microprocessors, here is complete set of 1000+ Multiple Choice Questions and Answers.
« Prev Page - Microprocessors Questions and Answers – Protected Virtual Address Mode (PVAM) -2
» Next Page - Microprocessors Questions and Answers – Protection

« Microprocessors Questions and Answers – Protected Virtual Address Mode (PVAM) -2
Microprocessors Questions and Answers – Protection »
advertisement

Deep Dive @ Sanfoundry:

  1. Java Programming Examples on Java.Lang
  2. Java Programming Examples on Computational Geometry Problems & Algorithms
  3. C# Programming Examples on Files
  4. C# Programming Examples on Exceptions
  5. Simple Java Programs
  6. C Programming Examples without using Recursion
  7. Java Programming Examples on Collections
  8. C Programming Examples on Matrix
  9. Java Programming Examples on Inheritance
  10. Microprocessor Questions & Answers
Manish Bhojasia, a technology veteran with 20+ years @ Cisco & Wipro, is Founder and CTO at Sanfoundry. He is Linux Kernel Developer and SAN Architect and is passionate about competency developments in these areas. He lives in Bangalore and delivers focused training sessions to IT professionals in Linux Kernel, Linux Debugging, Linux Device Drivers, Linux Networking, Linux Storage & Cluster Administration, Advanced C Programming, SAN Storage Technologies, SCSI Internals and Storage Protocols such as iSCSI & Fiber Channel. Stay connected with him below:
LinkedIn | Facebook | Twitter | Google+

Best Careers

Developer Tracks
SAN Developer
Linux Kernel Developer
Linux Driver Developer
Linux Network Developer

Live Training Photos
Mentoring
Software Productivity
GDB Assignment
Sanfoundry is No. 1 choice for Deep Hands-ON Trainings in SAN, Linux & C, Kernel Programming. Our Founder has trained employees of almost all Top Companies in India such as VMware, Citrix, Oracle, Motorola, Ericsson, Aricent, HP, Intuit, Microsoft, Cisco, SAP Labs, Siemens, Symantec, Redhat, Chelsio, Cavium, ST-Micro, Samsung, LG-Soft, Wipro, TCS, HCL, IBM, Accenture, HSBC, Mphasis, Tata-Elxsi, Tata VSNL, Mindtree, Cognizant and Startups.

Best Trainings

SAN I - Technology
SAN II - Admin
Linux Fundamentals
Advanced C Training
Linux-C Debugging
System Programming
Network Programming
Linux Threads
Kernel Programming
Kernel Debugging
Linux Device Drivers

Best Reference Books

Computer Science Books
Algorithm & Programming Books
Electronics Engineering Books
Electrical Engineering Books
Chemical Engineering Books
Civil Engineering Books
Mechanical Engineering Books
Industrial Engineering Books
Instrumentation Engg Books
Metallurgical Engineering Books
All Stream Best Books

Questions and Answers

1000 C Questions & Answers
1000 C++ Questions & Answers
1000 C# Questions & Answers
1000 Java Questions & Answers
1000 Linux Questions & Answers
1000 Python Questions
1000 PHP Questions & Answers
1000 Hadoop Questions
Cloud Computing Questions
Computer Science Questions
All Stream Questions & Answers

India Internships

Computer Science Internships
Instrumentation Internships
Electronics Internships
Electrical Internships
Mechanical Internships
Industrial Internships
Systems Internships
Chemical Internships
Civil Internships
IT Internships
All Stream Internships

About Sanfoundry

About Us
Copyright
Terms
Privacy Policy
Jobs
Bangalore Training
Online Training
Developers Track
Mentoring Sessions
Contact Us
Sitemap
© 2011 Sanfoundry. All Rights Reserved.