Microprocessors Questions and Answers – Netburst Microarchitecture For Pentium4 -2, Instruction Translation Lookaside Buffer (ITLB) and Branch Prediction

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This set of Microprocessors Questions and Answers for Entrance exams focuses on “Netburst Microarchitecture For Pentium4 -2, Instruction Translation Lookaside Buffer (ITLB) and Branch Prediction”.

1. If the logical processors want to execute complex IA-32 instructions simultaneously then the number of microcode instruction pointers required is
a) 1
b) 2
c) 3
d) 4
View Answer

Answer: b
Explanation: If both the logical processors want to execute complex IA-32 instructions simultaneously then two microcode instruction pointers are required, which will access the microcode ROM.
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2. Which of the following is a type of branch prediction?
a) static prediction
b) dynamic prediction
c) static and dynamic prediction
d) none
View Answer

Answer: c
Explanation: There are two types of branch prediction namely static prediction and dynamic prediction.

3. The prediction that is based on a statistical assumption that the majority of backward branches occur in repetitive loops is
a) static prediction
b) dynamic prediction
c) branch prediction
d) none
View Answer

Answer: a
Explanation: The static prediction is based on a statistical assumption that the majority of backward branches occur in the context of repetitive loops.

4. The advantage of static prediction is
a) simple and fast
b) does not require table lookups or calculations
c) performs without much degradation
d) all of the mentioned
View Answer

Answer: d
Explanation: The static prediction is simple and fast. It does not require table lookups or calculations. In case if a program contains a number of loops, static prediction performs without much degradation.

5. The dynamic branch prediction algorithms use
a) Branch History Table (BHT)
b) Branch Target Buffer (BTB)
c) Branch History Table and Branch Target Buffer
d) None
View Answer

Answer: c
Explanation: The dynamic branch prediction algorithms use two types of tables, namely Branch History Table (BHT) and Branch Target Buffer (BTB).
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6. The unit that preserves the history of each conditional branch is
a) Branch Target Buffer (BTB)
b) Branch History Table (BHT)
c) Static prediction
d) Dynamic prediction
View Answer

Answer: b
Explanation: The Branch History Table (BHT) preserves the history of each conditional branch that the speculative branch prediction unit encounters during the last several cycles.

7. The BHT keeps a record that indicates the likelihood of the branches grouped as
a) strongly taken
b) taken
c) not taken
d) all of the mentioned
View Answer

Answer: d
Explanation: The BHT keeps a record that indicates the likelihood that the branch will be taken based on its past history. The branches may be grouped as ‘strongly taken’, ‘taken’, ‘not taken’ and ‘strongly not taken’.

8. Each logical processor has
a) one 64-byte streaming buffer
b) one 32-byte streaming buffer
c) two 64-byte streaming buffers
d) two 32-byte streaming buffers
View Answer

Answer: c
Explanation: Each logic processor has its own set of two 64-byte streaming buffers, which store the instruction bytes and subsequently they are dispatched to the instruction decode stage.

9. If there is a trace cache miss, then the instruction bytes are required to be fetched from the
a) instruction decoder
b) Level2 cache
c) execution module
d) none of the mentioned
View Answer

Answer: b
Explanation: If there is a trace cache miss, then the instruction bytes are required to be fetched from the Level2 cache.
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10. The Instruction Translation Lookaside Buffer(ITLB) is present in
a) trace cache
b) instruction decoder
c) logical processors
d) all of the mentioned
View Answer

Answer: c
Explanation: Since there are two logical processors, there are two ITLBs. Thus each logical processor has its own ITLB and its own instruction pointer to track the progress of instruction fetch for each of them.

Sanfoundry Global Education & Learning Series – Microprocessors.

Here’s the list of Best Reference Books in Microprocessors.

To practice all areas of Microprocessors for Entrance exams, here is complete set of 1000+ Multiple Choice Questions and Answers.

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Manish Bhojasia, a technology veteran with 20+ years @ Cisco & Wipro, is Founder and CTO at Sanfoundry. He is Linux Kernel Developer & SAN Architect and is passionate about competency developments in these areas. He lives in Bangalore and delivers focused training sessions to IT professionals in Linux Kernel, Linux Debugging, Linux Device Drivers, Linux Networking, Linux Storage, Advanced C Programming, SAN Storage Technologies, SCSI Internals & Storage Protocols such as iSCSI & Fiber Channel. Stay connected with him @ LinkedIn