This set of Microprocessors Question Bank focuses on “Pro and Pentium-II -2”.
1. The decoder unit in fetch-decode unit converts the instructions into
a) executable statements
b) machine language statements
c) MMX instructions
d) micro operations
View Answer
Explanation: The decoder unit converts the fetched instructions into micro operations.
2. The logical source(s) and logical destination(s) that the micro operation has respectively are
a) 2,2
b) 1,3
c) 3,1
d) 3,2
View Answer
Explanation: Each microoperation contains two logical sources and one logical destination.
3. The microoperations that are converted by decoder are directly transferred to
a) decoder register
b) dispatch-execute unit
c) retire unit
d) register alias table
View Answer
Explanation: The microoperations are sent to the register alias table(RAT). The RAT translates the logical register references to the physical register set actually available in the CPU.
4. The pool of instructions that are fetched is stored in an addressable memory called
a) tristate buffer
b) branch target buffer
c) reorder buffer
d) order buffer
View Answer
Explanation: The pool of instructions that are fetched is stored in an array of content addressable memory called reorder buffer.
5. The unit that performs scheduling of instructions by determining the data dependencies is
a) fetch-decode unit
b) dispatch-execute unit
c) retire unit
d) none
View Answer
Explanation: The dispatch-execute unit performs scheduling of instructions by determining the data dependencies after which the microoperations of the scheduled instructions are executed in the execution unit.
6. The unit that reads the instruction pool and removes the microoperations which have been executed instruction pool is
a) fetch-decode unit
b) dispatch-execute unit
c) retire unit
d) decoding unit
View Answer
Explanation: The retire unit reads the instruction pool containing the instructions and removes the microoperations which have been executed instruction pool.
7. The speed of Pentium-Pro when compared to that of Pentium is
a) equal
b) twice
c) thrice
d) two-third
View Answer
Explanation: The features incorporated in Pentium-Pro enhances the speed of Pentium-Pro and is twice as that of Pentium.
8. Which of the following is not supported by Pentium-Pro?
a) multiple branch prediction
b) mmx instruction set
c) speculative execution
d) none
View Answer
Explanation: The Pentium-Pro does not support the MMX instruction set.
9. The feature of Pentium II is
a) high cache
b) operates at 2.8 volts
c) supports intel’s MMX instructions
d) all of the mentioned
View Answer
Explanation: The Pentium II has a higher cache and it can operate at 2.8 volts, thereby reducing power consumption. The most important change of Pentium II is that it can support Intel’s MMX instructions.
10. The results of speculative instruction execution is stored in
a) visible CPU registers
b) permanent memory
c) temporary memory
d) none
View Answer
Explanation: The results of speculative instruction execution should not be stored in CPU registers and are temporarily stored, since they may have to be discarded, in case if there is a branch instruction before these speculative instruction executions.
Sanfoundry Global Education & Learning Series – Microprocessors.
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