This set of Microprocessors Multiple Choice Questions & Answers (MCQs) focuses on “MMX Data Types, Wrap-around and Saturation Arithmetic, Multimedia Application Programming, Pentium III (P-III) CPU”.
1. In the data type, packed byte, the number of bytes that can be packed into one 64-bit quantity is
a) 2
b) 4
c) 8
d) 16
View Answer
Explanation: In packed byte data type, eight bytes can be packed into one 64-bit quantity.
2. Four words can be packed into 64-bit by using the data type,
a) unpacked word
b) packed word
c) packed doubled word
d) one quad word
View Answer
Explanation: By using the packed word data type, four words can be packed into 64-bits.
3. The number of double words that can be packed into 64-bit register using packed double word is
a) 2
b) 4
c) 6
d) 8
View Answer
Explanation: Using packed double word, two double words can be packed into 64-bit.
4. The data type, “one quad word” packs __________ into 64-bit.
a) two 32-bit quantities
b) four 16-bit words
c) one 32-bit and two 16-bit quantities
d) one single 64-bit quantity
View Answer
Explanation: The data type, “one quad word” packs one single 64-bit quantity into 64-bit register.
5. If the result of an operation is overflowed(exceeded than 16 bits) or underflowed then, only the lower 16-bits of the result are stored in the register and this effect is known as
a) overflow/underflow effect
b) wrap-around effect
c) exceeding memory effect
d) none
View Answer
Explanation: If the result of an operation is overflowed (exceeded than 16 bits) or underflowed then, only the lower 16-bits of the result are stored in the register, and this effect is known as wrap-around effect.
6. In a multitasking operating system environment, each task should return to its own processor state which is
a) contents of integer registers
b) contents of floating point registers
c) contents of MMX registers
d) all of the mentioned
View Answer
Explanation: In a multitasking operating system environment, each task should return to its own processor state, which should be saved when the task switching occurs. The processor state here means the contents of the registers, both integer and floating point or MMX register.
7. Which of the following exception generated by MMX is the same type of memory access exception as the X86 instructions?
a) page fault
b) segment not present
c) limit violation
d) all of the mentioned
View Answer
Explanation: The MMX instruction set generates the same type of memory access exception as the X86 instructions namely; page fault, segment does not present and limit violation.
8. When an MMX instruction is getting executed, the floating-point tag word is marked
a) 11
b) 10
c) 00
d) 01
View Answer
Explanation: When an MMX instruction is getting executed, the floating-point tag word is marked valid i.e. 00.
9. In a preemptive multitasking O.S., the saving and restoring of FP and MMX states are performed by
a) Control unit
b) O.S.
c) MMX instructions
d) MMX registers
View Answer
Explanation: In a preemptive multitasking O.S., the application does not know when it is preemptied. It is the job of the O.S. to save and restore the FP and MMX states, when performing a context switch. Thus the user need not save or restore the state.
10. The instruction of MMX that is essential when a floating-point routine calls an MMX routine or viceversa is
a) MOV
b) PADD
c) EMMS
d) None of the mentioned
View Answer
Explanation: The EMMS instruction is imperative when a floating point routine calls an MMX routine or vice-versa. If we do not use EMMS at the end of MMX routine, subsequent floating-point instructions will produce erratic results.
11. Pentium III is used in computers which run on the operating system of
a) windows NT
b) windows 98
c) unix
d) all of the mentioned
View Answer
Explanation: Pentium III is the best option to use in computers from high performance desktop to workstations and servers, running on operating systems like Windows NT, Windows 98 and UNIX.
12. The architecture of CPU of Pentium III is suitable for
a) multimedia
b) image processing
c) speech processing
d) all of the mentioned
View Answer
Explanation: The architecture of CPU of Pentium III is suitable for applications like imaging, image processing, speech processing, multimedia and internet applications.
13. The Pentium III has the operating frequencies as
a) 300MHz,350MHz,400MHz
b) 400MHz,450MHz,500MHz
c) 350MHz,400MHz,450MHz
d) 450MHz,500MHz,550MHz
View Answer
Explanation: The Pentium III has three versions operating at frequencies, 450MHz, 500MHz and 550MHz, which are all commercially available.
14. The Pentium III consists of
a) dual independent bus architecture
b) 512 Kbyte cache
c) eight 64-wide Intel MMX registers
d) all of the mentioned
View Answer
Explanation: The Pentium III has dual independent bus architecture that increases the bandwidth. It has a 512 Kbyte unified, non-blocking level2 cache and eight 64-wide Intel MMX registers.
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