Electronic Devices and Circuits Questions and Answers – DC Imperfections in Operational Amplifiers

This set of Electronic Devices and Circuits Quiz focuses on “DC Imperfections in Operational Amplifiers”.

1. Consider an inverting amplifier with a nominal gain of 1000 constructed from an op amp with an input offset voltage of 3 mV and with output saturation levels of ±10 V. What is (approximately) the peak sine-wave input signal that can be applied without output clipping?
a) 7 mV
b) 10 mV
c) 13 mV
d) 9mV
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2. Consider an inverting amplifier with a nominal gain of 1000 constructed from an op amp with an input offset voltage of 3 mV and with output saturation levels of ±10 V. If the effect of V_Os(input offset voltage) is nulled at room temperature (25₀C), how large an input can one now apply if the circuit is to operate at a constant temperature?
a) 8.5 mV
b) 9 mV
c) 9.5 mV
d) 10 mV
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3. Consider an inverting amplifier with a nominal gain of 1000 constructed from an op amp with an input offset voltage of 3 mV and with output saturation levels of ±10 V. If the effect of V_Os(input offset voltage) is nulled at room temperature (25₀C). The circuit is to operate at a temperature in the range 0°C to 75°C and the temperature coefficient of V_OS is 10 μV/°C?
a) 8.5 mV
b) 9 mV
c) 9.5 mV
d) 10 mV
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4. One of the DC imperfections of the amplifiers are dc offset voltage which is
a) Existence of output signal even when the common mode signal is zero
b) Existence of common mode signal causing zero output signal
c) Existence of output signal even when the differential signal is zero
d) Existence of differential signal causing zero output signal
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5. For the amplifier shown determine the value of the bias current (I_b) and input offset current (I_o) respectively.

a) I_b = I_B1 + I_B2 I_o = I_B1 – I_B2
b) I_b = I_B1 + I_B2 I_o = | I_B1 – I_B2 |
c) I_b = 0.5(I_B1 + I_B2) I_o = | I_B1 – I_B2 |
d) I_b = 0.5(I_B1 + I_B2) I_o = I_B1 – I_B2
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6. Consider the circuit shown below which reduces the impact of the input bias current. If I_B1 = I_B2 = Input bias current, then determine the value of R₃ so that the output voltage (v₀) is not impacted by the input bias current.

a) (R1 R2)/(R1+R2)
b) (R1 R2)/(R1-R2)
c) R1-(R1 R2)/(R1+R2)
d) R2- (R1 R2)/(R1+R2)
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7. Consider an inverting amplifier circuit designed using an op amp and two resistors, R₁ = 10 kΩ and R₂ = 1 MΩ. If the op amp is specified to have an input bias current of 100 nA and an input offset current of 10 nA, find the output dc offset voltage resulting.
a) 0.1 mV
b) 1 mV
c) 10 mV
d) 100 mV
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8. Consider a Miller integrator with a time constant of 1ms and an input resistance of 10 kΩ. Let the op amp have V_OS (offset voltage) = 2 mV and output saturation voltages of ±12 V. Assuming that when the power supply is turned on the capacitor voltage is zero, how long does it take for the amplifier to saturate?
a) 3s
b) 6s
c) 9s
d) 12s
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9. Consider a Miller integrator with a time constant of 1ms and an input resistance of 10 kΩ. Let the op amp have V_OS (offset voltage) = 2 mV and output saturation voltages of ±12 V. Select the largest possible value for a feedback resistor RF so that at least ±10 V of output signal swing remains available.
a) 10 kΩ
b) 100 kΩ
c) 1 MΩ
d) 10 MΩ
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10. Consider a Miller integrator with a time constant of 1ms and an input resistance of 10 kΩ. Let the op amp have V_OS (offset voltage) = 2 mV and output saturation voltages of ±12 V. What is the corner frequency of the resulting STC network?
a) 1 Hz
b) 0.16 Hz
c) 0.33 Hz
d) 0.5 Hz
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