This set of Linear Integrated Circuit Multiple Choice Questions & Answers (MCQs) focuses on “Active and Passive Components of IC-1”.
1. Which is the most striking feature in monolithic integrated circuit transistor?
a) Collector contact is present at the bottom of IC
b) Collector contact is present at the top of IC
c) Collector contact is absent
d) Collector contact is present on one of the sides of IC
Explanation: In IC transistor, the collector contact has to be taken from the top because collector is isolated from the substrate and next isolation island by reverse biased diodes.
2. Why monolithic IC transistor is preferred over discrete planar epitaxial transistor?
a) Due to structural difference
b) Increase in VCE (sat) and collector series resistor
c) Improvement in circuit performance
d) All of the mentioned
Explanation: As the collector contact is present on the top of IC transistor, it makes structural difference. Hence, it increases collector series resistance and VCE(sat) of device. From this, circuit performance is highly improved as matched transistor can be obtained.
3. Name the process that is used to overcome the increase in collector series resistance, which occurs due to the presence of collector contact at the top of integrated transistor.
a) Buried n+ layer
b) Buried p+ layer
c) Triple diffused layer
d) Buried epitaxial layer
Explanation: The value of collector series resistance of an integrated transistor can be easily reduced by a process known as “buried layer” or “Buried n+ layer”.
4. What is the reason for using Lateral pnp transistor in Integrated Circuits?
a) Requires simple process control
b) Simultaneous fabrication of pnp and npn transistors.
c) Provide good isolation
d) Miniaturization and cost reduction
Explanation: During the p-type base diffusion for npn transistor, two adjacent p-regions are diffused to form the emitter and collector region of the lateral pnp transistor (n-type epitaxial layer is used as base of the pnp transistor).Thus, pnp and npn transistors are fabricated simultaneously.
5. Which of the following transistor has the limitation, due to the requirement of additional fabrication steps and design consideration?
a) Vertical pnp transistor
b) Lateral pnp transistor
c) Triple diffused pnp transistor
d) Substrate pnp transistor
Explanation: In triple diffused pnp transistor fabrication process, an extra p-type diffusion is added to a standard npn-transistor after the n-diffusion to obtain a pnp transistor. However, the usefulness of such a structure is not used due to its limitation.
6. The ‘buried layer’ reduces collector series resistance by providing,
a) A low resistivity current path from n-type layer to n+ contact layer
b) A low resistivity current path from p-type layer to n+ contact layer
c) A high resistivity current path from n-type layer to n+ contact layer
d) A high resistivity current path from p-type layer to n+ contact layer
Explanation: A heavily doped n+ region is sandwiched between the n-type epitaxial collector and p-type substrate. This buried n+ region provide a low resistivity current path from active collector region (n-type layer) to the collector contact (n+ contact layer). In effect, the n+ layer shunt n-layer of collector region with respect to flow of current, thus effectively reduces the collector resistance.
7. At what potential, the substrate of a vertical pnp transistor should be kept to attain good isolation?
a) Same potential
b) Positive potential
c) Different potential
d) Negative potential
Explanation: The limitation of vertical pnp transistor is that, collector has to be held at a fixed negative potential, as substrate is to be held at the most negative potential in the circuit for providing good isolation.
8. Which method is used in the fabrication of pnp transistor?
a) Vertical substrate pnp
b) Triple diffused pnp
c) Lateral pnp
d) All of the mentioned
Explanation: pnp transistors in Integrated Circuits are fabricated in one of the following three ways.
9. State the correct reason for neglecting pnp transistor.
a) Increase in the series collector resistance of pnp transistor
b) Parasitic capacitance appears between collector and substrate
c) Current gain of pnp transistor is as low as 1.5 to 30
d) None of the mentioned
Explanation: Lateral pnp transistor has inferior characteristic as the base width is usually larger controlled by lateral diffusion of p-type impurities and photographic limitations during mask marking and alignment. Therefore, pnp transistor normally gives current gain as low as 1.5 to 30 compared to 50-300 for the npn transistor.
10. The diffusion of collector impurities in npn transistor should be small because,
a) No additional diffusion or masking steps required
b) Bandwidth is controlled by lateral diffusion of p-type impurity
c) Collector need not be kept at negative potential
d) None of the mentioned
Explanation: Generally, n-type impurities have smaller diffusion constant than p-type impurities, the n-type collector moves very little while p-type moves appreciably. Therefore, the diffusion coefficient of the collector impurities should be as small as possible to avoid the movement of the collector junction.
11. The advantage of Multi-emitter transistor is
a) To reduce fabrication steps
b) To save chip area
c) To lower design consideration
d) To provide linear output
Explanation: In Mutli-emitter transistor n+ emitter is diffused at three places in the p-type base. Thus, it is possible to save chip area and enhance component density of an IC.
12. Which transistor is best suitable to achieve very fast switching in digital circuits?
a) Lateral pnp transistor
b) Schottky transistor
c) Multi-emitter transistor
d) NPN transistor
Explanation: Fast switching can be achieved, if the transistor is prevented from entering into saturation. In schottky transistor, schottky diode is used to clamp between base and collector. Whenever the base current increases to saturation, the diode conducts. Thus, the base to collector voltage drops to 0.4v (less than VBE(cut-in)=0.5) and the transistor does not enter into saturation .
13. Choose the appropriate value of diode to get a speedy diode from the given values of storage time (n) in sec and forward voltage (V γ).
a) n = 56 , V γ = 0.96
b) n = 100 , V γ = 0.92
c) n = 9 , V γ = 0.85
d) n = 53 , V γ = 0.95
Explanation: The diode with lowest storage time and lowest forward voltage drop is useful for getting high speed diode to be used in digital integrated circuit.
Sanfoundry Global Education & Learning Series – Linear Integrated Circuit.