Linear Integrated Circuit Questions and Answers – PLL Applications


This set of Linear Integrated Circuit Multiple Choice Questions & Answers (MCQs) focuses on “PLL Applications”.

1. How to obtain a desired amount of multiplication in frequency multiplier?
a) By decreasing the multiplication factor
b) By increasing the input frequency
c) By selecting proper divide by N-network
d) None of the mentioned
View Answer

Answer: c
Explanation: The desired amount of multiplication can be obtained by properly selecting a divide by N-network. For example, to obtain the output frequency fout=5×fin, a divide by N = 5 network is needed.

2. Calculate the output frequency in a frequency multiplier if, fin = 200Hz is applied to a 7 divide by N-network.
a) 1.2kHz
b) 1.6kHz
c) 1.2kHz
d) 1.9kHz
View Answer

Answer: c
Explanation: Since the VCO is actually running at a multiple of input frequency. fout=divide by N-network x fin=7x200Hz=1400Hz

3. For what kind of input signal, the frequency divider can be avoided frequency multiplier?
a) Triangular waveform
b) Square waveform
c) Saw tooth waveform
d) Sine waveform
View Answer

Answer: a
Explanation: VCO can be directly locked to the nth harmonic of the input signal without connecting any frequency divider in between the input signal rich in harmonics like square wave.

4. What must the typical value of n for a frequency multiplication / division? (n->order of harmonics)
a) n ≤ 12
b) n > 11
c) n < 10
d) n = 7
View Answer

Answer: d
Explanation: As the amplitude of the higher order harmonics becomes less, effective locking may not take place for high values of n. So, the typical value of n is less than 10 for frequency multiplication / division.

5. Determine the offset frequency of frequency translation, when the output and input frequency are given as 75kHz and 1000Hz.
a) 35 kHz
b) 20 kHz
c) 29 kHz
d) 14 kHz
View Answer

Answer: b
Explanation: The output of the frequency translation fo= fs+f1
=> f1 = fo– fs= 75kHz-55kHz =20kHz.

6. The frequency corresponding to logic 1 state in FSK is called
a) Space frequency
b) Mark frequency
c) Both mark and space frequency
d) None of the mentioned
View Answer

Answer: b
Explanation: Frequency shift is usually accomplished by dividing a VCO with binary data signal. Therefore, the logic 1 state of the binary data signal corresponds to mark frequencies.

7. Find the frequency shift in FSK generator?
a) 230 Hz
b) 250 Hz
c) 180 Hz
d) 200 Hz
View Answer

Answer: d
Explanation: Frequency shift is the difference between FSK signals of 1070 Hz and 1270 Hz frequency, which is 200 Hz.

8. Which filter is chosen to remove the carrier component in the frequency shift keying?
a) Three stage filter
b) Two stage filter
c) Single stage filter
d) All of the mentioned
View Answer

Answer: a
Explanation: The high cut-off frequency of ladder filter is chosen to be approximately halfway between the maximum keying rate of 150Hz & twice the input frequency (≅ 2200Hz) which can be obtained using three stage filters.

Sanfoundry Global Education & Learning Series – Linear Integrated Circuits.


To practice all areas of Linear Integrated Circuits, here is complete set of 1000+ Multiple Choice Questions and Answers.

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Manish Bhojasia - Founder & CTO at Sanfoundry
Manish Bhojasia, a technology veteran with 20+ years @ Cisco & Wipro, is Founder and CTO at Sanfoundry. He lives in Bangalore, and focuses on development of Linux Kernel, SAN Technologies, Advanced C, Data Structures & Alogrithms. Stay connected with him at LinkedIn.

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