# Linear Integrated Circuit Questions and Answers – Basic Planar Process – 3

This set of Linear Integrated Circuit test focuses on “Basic Planar Process – 3”.

1. The major disadvantage of PN-junction isolation technique is:
a) Formation of Parasitic Resistance
b) Formation of Parasitic Capacitance
c) Formation of Isolation island
d) None of the mentioned

Explanation: The presence of Parasitic Capacitance at the isolating PN-junction, results in an inevitable capacitor coupling between the component and substrate. This also limits the performance of circuit at high frequencies.

2. Which isolation technique is used in applications like military and aeroscope?
a) Thin film isolation
b) PN-junction isolation
c) Barrier isolation
d) Dielectric isolation

Explanation: In dielectric isolation a layer of solid dielectric is used for isolation purpose. This layer is thick enough such that its associated capacitance is negligible. Moreover, it is more expensive, which is justified by its superior performance.

3. Pick out the incorrect statement
Aluminium is usually used for metallization of most IC as it offers
a) Relatively a good conductor
b) High resistance
c) Good mechanical bond with silicon
d) Deposition of aluminium film using vacuum deposition

Explanation: Aluminium forms low resistance (it is a good conductor of electricity). Therefore, it forms ohmic contact (Semiconductor-metal contact) with p-type silicon and heavily doped n-type silicon.

4. How the aluminium film coating is carried out in metallization process?
a) Heating and pouring aluminium in required place.
b) Aluminium is vacuum evaporated and then condensed
c) Placing the aluminium in required place and then heating it using tungsten
d) None of the mentioned

Explanation: Metallization process takes place in Vacuum evaporation chamber, where the material is evaporated by focussing a high power density electron beam. Vapours then hit the substrate and get condensed to form thin film coating.

5. What type of packing is suitable for Integrated Circuits?
a) Metal can package
b) Dual-in-line package
c) Ceramic flat package
d) All of the mentioned

Explanation: These packages are the three different possible packages available in Integrated Circuits. Its usage depends upon the number of leads required for application.

6. Metal can IC packages are available in

Explanation: The maximum lead available in a metal can IC package is 12. The remaining lead numbers are commonly available in dual-in-line packages.

7. What process is used in semiconductor industry to fabricate Integrated Circuits?
a) Silicon wafer preparation
b) Silicon planar process
c) Epitaxial growth of silicon
d) Photolithography process

Explanation: The planar process (Silicon planar technology) in semiconductor industry built individual components. It is the primary process by which Integrated Circuits are built. The other processes are the different steps involved within the planar process.

8. Which semiconductor is most widely used for fabrication of Integrated Circuit?
a) Germanium, Ge
b) Gallium Arsenide, GaAs
c) Silicon, Si
d) All of the mentioned

Explanation: Silicon is abundantly available in the form of sand. It is possible to form superior stable SiO2(Which has superb insulating property). Whereas GaAs is more difficult to grow in crystal form and Ge crystal will be destroyed at high temperature.

9. What will be the next step after slicing (process) silicon wafers?
a) All of the mentioned
b) Lapping
c) Polishing
d) Chemical

Explanation: When the silicon ingots are sliced for the given industrial dimension. It gives a rough surface and thus undergo lapping, polishing and chemical processing steps to get a smooth surface.

10. During ion implantation process (before the ion strike the wafer) the accelerated ions are passed through
a) Strong Electric field
b) Strong Magnetic field
c) Strong Electric and Magnetic Field
d) None of the mentioned

Explanation: During arc discharge in ion implantation, the unwanted impurities gets generated. The magnetic field acts to separate unwanted impurities from dopant ions.

11. In which method shallow penetration of dopants is possible?
a) Ion implantation
b) Vertical diffusion
c) Horizontal diffusion
d) Dopants diffusion

Explanation: The depth of diffusion in this method, can be easily regulated by control of the incident ion velocity and is capable of shallow penetration.

12. Which method is most suitable for silicon crystal growth in silicon wafer preparation?
a) Float zone process
b) Bridgeman-Stockbarger method
c) Czochralski crystal growth process
d) Laser heated pedestal growth

Explanation: Czochralski crystal growth processes obtain single crystal of semiconductor. The most important application of this method may be growth of large cylindrical ingot of single crystal silicon.

Sanfoundry Global Education & Learning Series – Linear Integrated Circuits.

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