Linear Integrated Circuit Questions and Answers – Basic Planar Process – 1

This set of Linear Integrated Circuit Multiple Choice Questions & Answers (MCQs) focuses on “Basic Planar Process – 1”.

1. Find the basic chemical reaction used for Epitaxial growth?
a) Sic4 + 4H \(\longleftrightarrow\) Si + 4Hcl
b) Sic2 + H2 \(\longleftrightarrow\) Si + 2Hcl
c) Sic4 + H2 \(\longleftrightarrow\) Si + 4Hcl
d) 2Sic2 + 2H2 \(\longleftrightarrow\) 4Si + Hcl
View Answer

Answer: c
Explanation: The basic chemical reaction used for epitaxial growth of pure silicon is the hydrogen reduction of silicon tetrachloride.

2. Which component is added to the p-type material in order to get the impurity concentration in epitaxial films?
a) Bi-borane (B2H2)
b) Phosphine (PH3)
c) Boron chloride (BCl3)
d) Phosphorous pentoxide (P2O5)
View Answer

Answer: a
Explanation: Bi-Borane is used for doping p-type materials and Phosphine is used for doping n-type materials whereas Boron chloride and Phosphorous pentoxide are used for doping during diffusion process.

3. Where are the silicon wafers placed in the reaction chamber for the epitaxial growth process?
a) Cup
b) Boats
c) Ingots
d) Crucible
View Answer

Answer: b
Explanation: The silicon rods are not directly placed in the reaction chamber instead they are placed on a rectangular graphite rod called boats and then it is heated to 1200oc.

4. Which of the following is used to obtain silicon crystal structure while fabricating Integrating Circuits?
a) Oxidation
b) Epitaxial growth
c) Photolithography
d) Silicon wafer preparations
View Answer

Answer: b
Explanation: Epitaxial growth is arranging of atoms in single crystal fashion upon a single crystal substrate, so that the resulting layer is an extension of the substrate crystal structure.

5. Why oxidation process is required?
a) To protect against contamination
b) To use it for fabrication various components
c) To prevent diffusion of impurities
d) All of the mentioned
View Answer

Answer: d
Explanation: Oxidation provides extreme hard protective coating, thus protecting against contamination and by selective etching, it can be made to fabricate components.
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6. Mention the chemical reaction for oxidation process
a) Si + 2H2O –> SiO2 + 2H2
b) Si + O2 –> SiO2
c) 2Si + 2H2O –> 2SiO2 + 2H2
d) 2Si + 2H2O + 2O2 –> 2SiO2 + 2H2 + O2
View Answer

Answer: a
Explanation: For oxidation process, silicon wafers are heated to a high temperature and simultaneously they are exposed to a gas containing H2O or O2 or both.

7. At what temperature should the oxidation process be carried out to get an oxide film of thickness 0.02 to 2µm?
a) 0-105oc
b) 950-1115oc
c) 200-850oc
d) 350-900oc
View Answer

Answer: b
Explanation: Silicon wafers are raised to a high temperature in the range 950-1115oc and are exposed to gas. The thickness of layer is governed by time, temperature and its moisture content.

8. Oxidation process in silicon planar technology is also called as
a) Photo oxidation
b) Silicon oxidation
c) Vapour oxidation
d) Thermal oxidation
View Answer

Answer: d
Explanation: The oxidation process is called thermal oxidation process because high temperature is used to grow the oxide layer.

9. In Crzochralski crystal growth process, the materials are heated up to
a) 950oc
b) 1000 oc
c) 1420oc
d) 1200oc
View Answer

Answer: c
Explanation: The materials are heated above 1420oc which is greater than the silicon melting point.

10. How to obtain silicon ingots of 10-15cm diameter?
a) By crystal pulling process
b) By crystal melting process
c) By crystal growing process
d) All of the mentioned
View Answer

Answer: a
Explanation: During crystal pulling process, the seed crystal and the crucible rotate in opposite direction, in order to produce ingots of circular cross section (diameter of 10/15cm normally obtained).

11. If the thickness of wafer after all polishing steps in silicon wafer preparation is 23-40 mils. Find its raw cut slice thickness?
a) 16-32 mils
b) 23-40 mils
c) 8-12 mils
d) None of the mentioned
View Answer

Answer: a
Explanation: Usually the silicon wafer obtained has a very rough surface due to slicing operation. So, these wafers undergo a number of polishing steps to produce flat and smooth polished surface. Therefore, the thickness of wafers will be reduced from its raw cut slice.

Sanfoundry Global Education & Learning Series – Linear Integrated Circuits.

To practice all areas of Linear Integrated Circuits, here is complete set of 1000+ Multiple Choice Questions and Answers.

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Manish Bhojasia - Founder & CTO at Sanfoundry
Manish Bhojasia, a technology veteran with 20+ years @ Cisco & Wipro, is Founder and CTO at Sanfoundry. He lives in Bangalore, and focuses on development of Linux Kernel, SAN Technologies, Advanced C, Data Structures & Alogrithms. Stay connected with him at LinkedIn.

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