Logic Design Questions and Answers – Gated Latches and Edge-Triggered D Flip-Flop

This set of Logic Design Multiple Choice Questions & Answers (MCQs) focuses on “Gated Latches and Edge-Triggered D Flip-Flop”.

1. Compared to normal latches, gated latches have an extra input called the enable input.
a) True
b) False
View Answer

Answer: a
Explanation: Gated latches have an additional input called the gate or enable input. When the gate input is inactive the state of the latch cannot change. When the gate input is active, the latch is controlled by the other inputs and operates as a normal latch.

2. The gated SR Latch does not suffer from a Race condition.
a) True
b) False
View Answer

Answer: b
Explanation: The input combination when G (enable input), S and R are high causes a race condition. This input combination is not allowed because if race conditions occur, the behaviour is undefined. Hence this input combination is not allowed.

3. What kind of triggering is it called if the Flip-Flop’s output changes only when the input clock signal transitions from 0 to 1?
a) Positive Edge triggered
b) Negative edge triggered
c) Level triggered
d) Sequential logic
View Answer

Answer: a
Explanation: If the Flip-Flop’s output changes when the input clock signal transitions from 0 to 1, then the flip-flop is said to be positive edge triggered or rising edge triggered, since the flip-flop’s output changes when the clock signal rises from 0 to 1.
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4. What kind of triggering is it called if the Flip-Flop’s output changes only when the input clock signal transitions from 1 to 0?
a) Positive Edge triggered
b) Negative edge triggered
c) Level triggered
d) Sequential logic
View Answer

Answer: b
Explanation: If the Flip-Flop’s output changes when the input clock signal transitions from 0 to 1, then it is called negative edge triggered or falling edge triggered, since the flip-flop’s output changes when the clock signal falls from 1 to 0.

5. What on the Flip-Flop symbol identifies it as a positive edge triggered one?
a) Arrowhead on the clock input
b) Clk
c) Arrowhead with bubble on the clock input
d) Plus sign
View Answer

Answer: a
Explanation: The arrowhead symbol on the Flip-Flop identifies it as a positive edge triggered one, since there is no bubble. The output of a positive edge triggered flip-flop changes when the clock signal rises from 0 to 1.

6. What on the Flip-Flop symbol identifies it as a negative edge triggered one?
a) Arrowhead on the clock input
b) Clk
c) Arrowhead with bubble on the clock input
d) Plus sign
View Answer

Answer: c
Explanation: The arrowhead symbol on the Flip-Flop identifies it as edge triggered. An inversion bubble at the clock input represents that it is a negative edge triggered one. The output of a negative edge triggered flip-flop changes when the clock signal falls from 1 to 0.

7. What is the amount of time that the input is required to be kept stable before the active edge called?
a) Setup time
b) Hold time
c) Maximum clock frequency
d) Minimum clock frequency
View Answer

Answer: a
Explanation: The amount of time that the inputs must be stable before the active edge is called the setup time. If the inputs are not held stable before the active edge for at least the setup time, then the Flip-Flop does not function properly.
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8. What is the amount of time that the input is required to be kept stable before the active edge called?
a) Setup time
b) Hold time
c) Maximum clock frequency
d) Minimum clock frequency
View Answer

Answer: b
Explanation: The amount of time that the inputs must hold the same value after the active edge is the hold time. If the inputs are not held at the same value after the active edge for at least the hold time, then the behaviour of the Flip-Flop becomes unpredictable.

Sanfoundry Global Education & Learning Series – Logic Design.

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To practice all areas of Logic Design, here is complete set of 1000+ Multiple Choice Questions and Answers.

If you find a mistake in question / option / answer, kindly take a screenshot and email to [email protected]

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Manish Bhojasia - Founder & CTO at Sanfoundry
Manish Bhojasia, a technology veteran with 20+ years @ Cisco & Wipro, is Founder and CTO at Sanfoundry. He lives in Bangalore, and focuses on development of Linux Kernel, SAN Technologies, Advanced C, Data Structures & Alogrithms. Stay connected with him at LinkedIn.

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