Logic Design Questions and Answers – VHDL Operators

This set of Logic Design Multiple Choice Questions & Answers (MCQs) focuses on “VHDL Operators”.

1. The predefined operators in VHDL are grouped into 5 classes.
a) True
b) False
View Answer

Answer: b
Explanation: Predefined VHDL operators can be grouped into seven classes:
i. binary logical operators: and or nand nor xor xnor
ii. relational operators: =, /=, <, <=, >, >=
iii. shift operators: sll, srl, sla, sra, rol, ror
iv. adding operators: +, −, & (concatenation)
v. unary sign operators: +, −
vi. multiplying operators: *, /, mod, rem
vii. miscellaneous operators: not, abs, **
When parentheses are not used, operators in class 7 have highest precedence and are applied first, followed by class 6, then class 5, etc. Class 1 operators have lowest precedence and are applied last. Operators in the same class have the same precedence and
are applied from left to right in an expression.

2. Analyse the following code snippet and compute the value of Y.

signal A, B, C, D: integer;
signal Y: boolean;
begin
A <= 1;
B <= 2;
C <= 3;
D <= 4;
Y <= (A > B) or (C <= D);

a) 4
b) 0
c) 1
d) 2
View Answer

Answer: c
Explanation: A > B evaluates to FALSE. C <= D evaluates to TRUE. Since these 2 expressions are combined using the OR operator, the result is TRUE. TRUE is represented by 1 and FALSE is represented by 0. Hence the result is 1.
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3. Analyse the following code snippet and compute the value of Y.

signal A, B: integer;
signal Y: boolean;
begin
A <= 1;
B <= 2;
Y <= A = B;

a) 1
b) 0
c) 2
d) 3
View Answer

Answer: b
Explanation: A = B evaluates to FALSE since 1 is not equal to 2. TRUE is represented by 1 and FALSE is represented by 0. Hence the result is 0.
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4. Analyse the following code snippet and compute the value of Y.

signal A, B: integer;
signal Y: integer;
begin
A <= 1;
B <= 2;
Y <= A * B;

a) 1
b) 0
c) 2
d) 3
View Answer

Answer: c
Explanation: * represents multiplication. The product of A and B is 2 since 2*1 = 2. This value is stored in Y. So the value of Y will be 2.
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5. Analyse the following code snippet and compute the value of Y.

signal A, B: integer;
signal Y: boolean;
begin
A <= 1;
B <= 2;
Y <= A /= B;

a) 1
b) 0
c) 2
d) 3
View Answer

Answer: a
Explanation: Here A is not equal to B since 1 is not equal to 2. /= represents “not equal to”. Hence A /= B evaluates to TRUE. TRUE is represented by 1 and FALSE is represented by 0. Hence the result is 1.

6. Analyse the following code snippet and compute the value of Y.

signal A, B, C, D: integer;
signal Y: boolean;
begin
A <= 1;
B <= 2;
C <= 3;
D <= 4;
Y <= (A > B) and (C <= D);

a) 4
b) 0
c) 1
d) 2
View Answer

Answer: b
Explanation: A > B evaluates to FALSE. C <= D evaluates to TRUE. Since these 2 expressions are combined using the AND operator, the result is FALSE. TRUE is represented by 1 and FALSE is represented by 0. Hence the result is 0.

7. Analyse the following code snippet and compute the value of Y.

signal A, B, C, D: integer;
signal Y: boolean;
begin
A <= 1;
B <= 2;
C <= 3;
D <= 4;
Y <= (A > B) xor (C <= D);

a) 4
b) 0
c) 1
d) 2
View Answer

Answer: c
Explanation: A > B evaluates to FALSE. C <= D evaluates to TRUE. Since these 2 expressions are combined using the XOR operator, the result is TRUE. TRUE is represented by 1 and FALSE is represented by 0. Hence the result is 1.

8. Analyse the following code snippet and compute the value of Y.

signal A, B, C, D: integer;
signal Y: boolean;
begin
A <= 1;
B <= 2;
C <= 3;
D <= 4;
Y <= (A > B) xnor (C <= D);

a) 4
b) 0
c) 1
d) 2
View Answer

Answer: b
Explanation: A > B evaluates to FALSE. C <= D evaluates to TRUE. Since these 2 expressions are combined using the XNOR operator, the result is FALSE. TRUE is represented by 1 and FALSE is represented by 0. Hence the result is 0.

9. Analyse the following code snippet and compute the value of Y.

signal A, B, C, D: integer;
signal Y: boolean;
begin
A <= 1;
B <= 2;
C <= 3;
D <= 4;
Y <= (A > B) nand (C <= D);

a) 4
b) 0
c) 1
d) 2
View Answer

Answer: c
Explanation: A > B evaluates to FALSE. C <= D evaluates to TRUE. Since these 2 expressions are combined using the NAND operator, the result is TRUE. TRUE is represented by 1 and FALSE is represented by 0. Hence the result is 1.

10. Analyse the following code snippet and compute the value of Y.

signal A, B, C, D: integer;
signal Y: boolean;
begin
A <= 1;
B <= 2;
C <= 3;
D <= 4;
Y <= (A > B) nor (C <= D);

a) 4
b) 0
c) 1
d) 2
View Answer

Answer: b
Explanation: A > B evaluates to FALSE. C <= D evaluates to TRUE. Since these 2 expressions are combined using the NOR operator, the result is FALSE. TRUE is represented by 1 and FALSE is represented by 0. Hence the result is 0.

11. Analyse the following code snippet and compute the value of Y.

signal A, B: integer;
signal Y: integer;
begin
A <= 1;
B <= 2;
Y <= B / A;

a) 1
b) 0
c) 2
d) 3
View Answer

Answer: c
Explanation: / represents division. B divided by A is 2 since 2 divided by 1 is 2. This value is stored in Y. So the value of Y will be 2.

Sanfoundry Global Education & Learning Series – Logic Design.

To practice all areas of Logic Design, here is complete set of 1000+ Multiple Choice Questions and Answers.

If you find a mistake in question / option / answer, kindly take a screenshot and email to [email protected]

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Manish Bhojasia - Founder & CTO at Sanfoundry
Manish Bhojasia, a technology veteran with 20+ years @ Cisco & Wipro, is Founder and CTO at Sanfoundry. He lives in Bangalore, and focuses on development of Linux Kernel, SAN Technologies, Advanced C, Data Structures & Alogrithms. Stay connected with him at LinkedIn.

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