Logic Design Questions and Answers – Set-Reset Latch

This set of Logic Design Multiple Choice Questions & Answers (MCQs) focuses on “Set-Reset Latch”.

1. Combinational circuits can have memory.
a) True
b) False
View Answer

Answer: b
Explanation: Only Sequential circuits have memory. Combinational circuits don’t have memory. Combinational circuits don’t store any state, hence they do not have memory. Hence the answer is False.

2. All digital circuits with feedback are not sequential circuits. True or False?
a) True
b) False
View Answer

Answer: a
Explanation: Sequential circuits must have feedback, but not all circuits with feedback are sequential. There are circuits with feedback that are not sequential in operation. Hence the answer is True.

3. Which type of switch can be debounced using an SR Latch?
a) Double Pole Single Throw
b) Single Pole Single Throw
c) Single Pole Double Throw
d) Pushbutton switch
View Answer

Answer: c
Explanation: Debouncing using SR Latch requires a double throw switch that switches between two contacts; it will not work with a single throw switch. Pushbutton switches are single throw type, hence debouncing using SR latch is not applicable.
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4. How many stable states are possible for an SR Latch?
a) 1
b) 2
c) 3
d) 4
View Answer

Answer: b
Explanation: Only 2 stable states are possible in an SR Latch. They are the SET and RESET states.
In the SET state, the output is HIGH and in the RESET state the output is LOW.

5. Which set of inputs is not allowed for an SR latch?
a) S = 1, R = 1
b) S = 0, R = 1
c) S = 0, R = 0
d) S = 1, R = 0
View Answer

Answer: a
Explanation: It is a disallowed state as it implies Q = Q’ = 0, but Q should be the complement of Q’. The outputs would not be one which is allowed in the operation of an SR Latch. Hence both the inputs are not allowed to be HIGH at the same time in an SR latch.

6. What is the minimum number of NOR gates required to make an SR latch?
a) 1
b) 2
c) 3
d) 4
View Answer

Answer: b
Explanation: An SR latch can be built from 2 cross-coupled NOR gates. The circuit diagram is as shown below.

7. What is the minimum number of NAND gates required to make an SR latch?
a) 1
b) 2
c) 3
d) 4
View Answer

Answer: b
Explanation: An SR latch can be built from 2 cross-coupled NAND gates. The circuit diagram is as shown below.

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Sanfoundry Global Education & Learning Series – Logic Design.

To practice all areas of Logic Design, here is complete set of 1000+ Multiple Choice Questions and Answers.

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Manish Bhojasia - Founder & CTO at Sanfoundry
Manish Bhojasia, a technology veteran with 20+ years @ Cisco & Wipro, is Founder and CTO at Sanfoundry. He lives in Bangalore, and focuses on development of Linux Kernel, SAN Technologies, Advanced C, Data Structures & Alogrithms. Stay connected with him at LinkedIn.

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