Embedded Systems Questions and Answers – Risk and Dependability Analysis

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This set of Embedded Systems Multiple Choice Questions & Answers (MCQs) focuses on “Risk and Dependability Analysis”.

1. Which is a top-down method of analyzing risks?
a) FTA
b) FMEA
c) Hazards
d) Damages
View Answer

Answer: a
Explanation: The FTA is Fault tree analysis which is a top-down method of analyzing risks. It starts with damage and comes up with the reasons for the damage. The analysis is done graphically by using gates.
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2. What is FTA?
a) free tree analysis
b) fault tree analysis
c) fault top analysis
d) free top analysis
View Answer

Answer: b
Explanation: The FTA is also known as the Fault tree analysis which is a top-down method of analyzing risks. The analysis starts with damage and comes up with the reasons for the damage. The analysis can be checked graphically by using gates.

3. Which gate is used in the geometrical representation, if a single event causes hazards?
a) AND
b) NOT
c) NAND
d) OR
View Answer

Answer: d
Explanation: The fault tree analysis is done graphically by using gates mainly AND gates and OR gates. The OR gate is used to represent the single event which is hazardous. Similarly, AND gates are used in the graphical representation if several events cause hazards.

4. Which analysis uses the graphical representation of hazards?
a) Power model
b) FTA
c) FMEA
d) First power model
View Answer

Answer: b
Explanation: The FTA is done graphically by using gates mainly AND gates and OR gates. The OR gate is used to represent the single event which is hazardous.
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5. Which gate is used in the graphical representation, if several events cause hazard?
a) OR
b) NOT
c) AND
d) NAND
View Answer

Answer: c
Explanation: The fault tree analysis is done graphically by using gates. The main gates used are AND gates and OR gates. The AND gates are used in the graphical representation if several events cause hazards.

6. What is FMEA?
a) fast mode and effect analysis
b) front mode and effect analysis
c) false mode and effect analysis
d) failure mode and effect analysis
View Answer

Answer: d
Explanation: The FMEA is the failure mode and the effect analysis, in which the analysis starts at the components and tries to estimate their reliability.

7. Which of the following can compute the exact number of clock cycles required to run an application?
a) layout model
b) coarse-grained model
c) fine-grained model
d) register-transaction model
View Answer

Answer: c
Explanation: The fine-grained model has the cycle-true instruction set simulation. In this modelling, it is possible to compute the exact number of clock cycles which is required to run an application.
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8. Which model is capable of reflecting the bidirectional transfer of information?
a) switch-level model
b) gate level
c) layout model
d) circuit-level model
View Answer

Answer: a
Explanation: The switch model can be used in the simulation of the transistors since the transistor is the very basic component in a switch. It is capable of reflecting bidirectional transferring of the information.

Sanfoundry Global Education & Learning Series – Embedded System.

To practice all areas of Embedded System, here is complete set of 1000+ Multiple Choice Questions and Answers.

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Manish Bhojasia, a technology veteran with 20+ years @ Cisco & Wipro, is Founder and CTO at Sanfoundry. He is Linux Kernel Developer & SAN Architect and is passionate about competency developments in these areas. He lives in Bangalore and delivers focused training sessions to IT professionals in Linux Kernel, Linux Debugging, Linux Device Drivers, Linux Networking, Linux Storage, Advanced C Programming, SAN Storage Technologies, SCSI Internals & Storage Protocols such as iSCSI & Fiber Channel. Stay connected with him @ LinkedIn