This set of Computer Organization and Architecture Multiple Choice Questions & Answers (MCQs) focuses on “Interrupts”.
1. The interrupt-request line is a part of the
a) Data line
b) Control line
c) Address line
d) None of the mentioned
Explanation: The Interrupt-request line is a control line along which the device is allowed to send the interrupt signal.
2. The return address from the interrupt-service routine is stored on the
a) System heap
b) Processor register
c) Processor stack
Explanation: The Processor after servicing the interrupts as to load the address of the previous process and this address is stored in the stack.
3. The signal sent to the device from the processor to the device after receiving an interrupt is
b) Return signal
c) Service signal
d) Permission signal
Explanation: The Processor upon receiving the interrupt should let the device know that its request is received.
4. When the process is returned after an interrupt service ______ should be loaded again.
i) Register contents
ii) Condition codes
iii) Stack contents
iv) Return addresses
b) ii,iii and iv
5. The time between the receiver of an interrupt and its service is ______
a) Interrupt delay
b) Interrupt latency
c) Cycle time
d) Switching time
Explanation: The delay in servicing of an interrupt happens due to the time is taken for contact switch to take place.
6. Interrupts form an important part of _____ systems.
a) Batch processing
c) Real-time processing
Explanation: This forms an important part of the Real time system since if a process arrives with greater priority then it raises an interrupt and the other process is stopped and the interrupt will be serviced.
7. A single Interrupt line can be used to service n different devices?
8. ______ type circuits are generally used for interrupt service lines
9. The resistor which is attached to the service line is called _____
a) Push-down resistor
b) Pull-up resistor
c) Break down resistor
d) Line resistor
Explanation: This resistor is used to pull up the voltage of the interrupt service line.
10. An interrupt that can be temporarily ignored is
a) Vectored interrupt
b) Non-maskable interrupt
c) Maskable interrupt
d) High priority interrupt
Explanation: The maskable interrupts are usually low priority interrupts which can be ignored if a higher priority process is being executed.
11. The 8085 microprocessor responds to the presence of an interrupt
a) As soon as the trap pin becomes ‘LOW’
b) By checking the trap pin for ‘high’ status at the end of each instruction fetch
c) By checking the trap pin for ‘high’ status at the end of execution of each instruction
d) By checking the trap pin for ‘high’ status at regular intervals
Explanation: The 8085 microprocessor are designed to complete the execution of the current instruction and then to service the interrupts.
12. CPU as two modes privileged and non-privileged. In order to change the mode from privileged to non-privileged
a) A hardware interrupt is needed
b) A software interrupt is needed
c) Either hardware or software interrupt is needed
d) A non-privileged instruction (which does not generate an interrupt)is needed
Explanation: A software interrupt by some program which needs some CPU service, at that time the two modes can be interchanged.
13. Which interrupt is unmaskable?
a) RST 5.5
b) RST 7.5
d) Both RST 5.5 and 7.5
Explanation: The trap is a non-maskable interrupt as it deals with the ongoing process in the processor. The trap is initiated by the process being executed due to lack of data required for its completion. Hence trap is unmaskable.
14. From amongst the following given scenarios determine the right one to justify interrupt mode of data transfer
i) Bulk transfer of several kilo-byte
ii) Moderately large data transfer of more than 1kb
iii) Short events like mouse action
iv) Keyboard inputs
a) i and ii
c) i,ii and iv
15. How can the processor ignore other interrupts when it is servicing one
a) By turning off the interrupt request line
b) By disabling the devices from sending the interrupts
c) BY using edge-triggered request lines
d) All of the mentioned
Sanfoundry Global Education & Learning Series – Computer Organization and Architecture.