Computer Organization Questions and Answers – Synchronous DRAM

This set of Computer Organization and Architecture Multiple Choice Questions & Answers (MCQs) focuses on “Synchronous DRAM”.

1. The difference between DRAM’s and SDRAM’s is/are ________
a) The DRAM’s will not use the master slave relationship in data transfer
b) The SDRAM’s make use of clock
c) The SDRAM’s are more power efficient
d) None of the mentioned
View Answer

Answer: b
Explanation: The SDRAM’s make use of clock signals to synchronize their operation.

2. The difference in the address and data connection between DRAM’s and SDRAM’s is _______
a) The usage of more number of pins in SDRAM’s
b) The requirement of more address lines in SDRAM’s
c) The usage of a buffer in SDRAM’s
d) None of the mentioned
View Answer

Answer: c
Explanation: The SDRAM uses buffered storage of address and data.

3. A _______ is used to restore the contents of the cells.
a) Sense amplifier
b) Refresh counter
c) Restorer
d) None of the mentioned
View Answer

Answer: b
Explanation: The Counter helps to restore the charge on the capacitor.
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4. The mode register is used to _______
a) Select the row or column data transfer mode
b) Select the mode of operation
c) Select mode of storing the data
d) All of the mentioned
View Answer

Answer: b
Explanation: The mode register is used to choose between burst mode or bit mode of operation.

5. In a SDRAM each row is refreshed every 64ms.
a) True
b) False
View Answer

Answer: a
Explanation: None.

6. The time taken to transfer a word of data to or from the memory is called as ______
a) Access time
b) Cycle time
c) Memory latency
d) None of the mentioned
View Answer

Answer: c
Explanation: The performance of the memory is measured by means of latency.

7. In SDRAM’s buffers are used to store data that is read or written.
a) True
b) False
View Answer

Answer: a
Explanation: In SDRAM’s all the bytes of data to be read or written are stored in the buffer until the operation is complete.
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8. The SDRAM performs operation on the _______
a) Rising edge of the clock
b) Falling edge of the clock
c) Middle state of the clock
d) Transition state of the clock
View Answer

Answer: a
Explanation: The SDRAM’s are edge-triggered.

9. DDR SDRAM’s perform faster data transfer by _______
a) Integrating the hardware
b) Transferring on both edges
c) Improving the clock speeds
d) Increasing the bandwidth
View Answer

Answer: b
Explanation: By transferring data on both the edges the bandwidth is effectively doubled.
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10. To improve the data retrieval rate ____________
a) The memory is divided into two banks
b) The hardware is changed
c) The clock frequency is increased
d) None of the mentioned
View Answer

Answer: a
Explanation: The division of memory into two banks makes it easy to access two different words at each edge of the clock.

Sanfoundry Global Education & Learning Series – Computer Organisation and Architecture.

If you find a mistake in question / option / answer, kindly take a screenshot and email to [email protected]

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Manish Bhojasia - Founder & CTO at Sanfoundry
Manish Bhojasia, a technology veteran with 20+ years @ Cisco & Wipro, is Founder and CTO at Sanfoundry. He lives in Bangalore, and focuses on development of Linux Kernel, SAN Technologies, Advanced C, Data Structures & Alogrithms. Stay connected with him at LinkedIn.

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