This set of Computer Organization and Architecture Multiple Choice Questions & Answers (MCQs) focuses on “ARM architecture-1”.
1. ARM stands for _____________
a) Advanced Rate Machines
b) Advanced RISC Machines
c) Artificial Running Machines
d) Aviary Running Machines
Explanation: ARM is a type of system architecture.
2. The main importance of ARM micro-processors is providing operation with ______
a) Low cost and low power consumption
b) Higher degree of multi-tasking
c) Lower error or glitches
d) Efficient memory management
Explanation: The Stand alone feature of the ARM processors is that they’re economically viable.
3. ARM processors where basically designed for _______
a) Main frame systems
b) Distributed systems
c) Mobile systems
d) Super computers
Explanation: These ARM processors are designed for handheld devices.
4. The ARM processors don’t support Byte addressability.
Explanation: The ability to store data in the form of consecutive bytes.
5. The address space in ARM is ______
6. The address system supported by ARM systems is/are ______
a) Little Endian
b) Big Endian
c) X-Little Endian
d) Both Little & Big Endian
Explanation: The way in which, the data gets stored in the system or the way of address allocation is called as address system.
7. Memory can be accessed in ARM systems by _____ instructions.
8. RISC stands for _________
a) Restricted Instruction Sequencing Computer
b) Restricted Instruction Sequential Compiler
c) Reduced Instruction Set Computer
d) Reduced Induction Set Computer
Explanation: This is a system architecture, in which the performance of the system is improved by reducing the size of the instruction set.
9. In the ARM, PC is implemented using ____
c) General purpose register
Explanation: PC is the place where the next instruction about to be executed is stored.
10. The additional duplicate register used in ARM machines are called as _______
b) Banked registers
c) EXtra registers
d) Extential registers
Explanation: The duplicate registers are used in situations of context switching.
11. The banked registers are used for ______
a) Switching between supervisor and interrupt mode
b) Extended storing
c) Same as other general purpose registers
d) None of the mentioned
Explanation: When switching from one mode to another, instead of storing the register contents somewhere else it’ll be kept in the duplicate registers and the new values are stored in the actual registers.
12. Each instruction in ARM machines is encoded into ____ Word.
a) 2 byte
b) 3 byte
c) 4 byte
d) 8 byte
Explanation: The data is encrypted to make them secure.
13. All instructions in ARM are conditionally executed.
14. The addressing mode where the EA of the operand is the contents of Rn is ______
a) Pre-indexed mode
b) Pre-indexed with write back mode
c) Post-indexed mode
d) None of the mentioned
15. The effective address of the instruction written in Post-indexed mode, MOVE[Rn]+Rm is _______
a) EA = [Rn].
b) EA = [Rn + Rm].
c) EA = [Rn] + Rm
d) EA = [Rm] + Rn
Explanation: Effective address is the address that the computer acquires from the current instruction being executed.
Sanfoundry Global Education & Learning Series – Computer Organization and Architecture.