This set of Computer Organization and Architecture Multiple Choice Questions & Answers (MCQs) focuses on “Performance of a System”.
1. During the execution of the instructions, a copy of the instructions is placed in the ______
a) Register
b) RAM
c) System heap
d) Cache
View Answer
Explanation: None.
2. Two processors A and B have clock frequencies of 700 Mhz and 900 Mhz respectively. Suppose A can execute an instruction with an average of 3 steps and B can execute with an average of 5 steps. For the execution of the same instruction which processor is faster?
a) A
b) B
c) Both take the same time
d) Insufficient information
View Answer
Explanation: The performance of a system can be found out using the Basic performance formula.
3. A processor performing fetch or decoding of different instruction during the execution of another instruction is called ______
a) Super-scaling
b) Pipe-lining
c) Parallel Computation
d) None of the mentioned
View Answer
Explanation: Pipe-lining is the process of improving the performance of the system by processing different instructions at the same time, with only one instruction performing one specific operation.
4. For a given FINITE number of instructions to be executed, which architecture of the processor provides for a faster execution?
a) ISA
b) ANSA
c) Super-scalar
d) All of the mentioned
View Answer
Explanation: In super-scalar architecture, the instructions are set in groups and they’re decoded and executed together reducing the amount of time required to process them.
5. The clock rate of the processor can be improved by _________
a) Improving the IC technology of the logic circuits
b) Reducing the amount of processing done in one step
c) By using the overclocking method
d) All of the mentioned
View Answer
Explanation: The clock rate(frequency of the processor) is the hardware dependent quantity it is fixed for a given processor.
6. An optimizing Compiler does _________
a) Better compilation of the given piece of code
b) Takes advantage of the type of processor and reduces its process time
c) Does better memory management
d) None of the mentioned
View Answer
Explanation: An optimizing compiler is a compiler designed for the specific purpose of increasing the operation speed of the processor by reducing the time taken to compile the program instructions.
7. The ultimate goal of a compiler is to ________
a) Reduce the clock cycles for a programming task
b) Reduce the size of the object code
c) Be versatile
d) Be able to detect even the smallest of errors
View Answer
Explanation: None.
8. SPEC stands for _______
a) Standard Performance Evaluation Code
b) System Processing Enhancing Code
c) System Performance Evaluation Corporation
d) Standard Processing Enhancement Corporation
View Answer
Explanation: SPEC is a corporation that started to standardize the evaluation method of a system’s performance.
9. As of 2000, the reference system to find the performance of a system is _____
a) Ultra SPARC 10
b) SUN SPARC
c) SUN II
d) None of the mentioned
View Answer
Explanation: In SPEC system of measuring a system’s performance, a system is used as a reference against which other systems are compared and performance is determined.
10. When Performing a looping operation, the instruction gets stored in the ______
a) Registers
b) Cache
c) System Heap
d) System stack
View Answer
Explanation: When a looping or branching operation is carried out the offset value is stored in the cache along with the data.
11. The average number of steps taken to execute the set of instructions can be made to be less than one by following _______
a) ISA
b) Pipe-lining
c) Super-scaling
d) Sequential
View Answer
Explanation: The number of steps required to execute a given set of instructions is sufficiently reduced by using super-scaling. In this method, a set of instructions are grouped together and are processed.
12. If a processor clock is rated as 1250 million cycles per second, then its clock period is ________
a) 1.9 * 10-10 sec
b) 1.6 * 10-9 sec
c) 1.25 * 10-10 sec
d) 8 * 10-10 sec
View Answer
Explanation: None.
13. If the instruction, Add R1, R2, R3 is executed in a system that is pipe-lined, then the value of S is (Where S is a term of the Basic performance equation)?
a) 3
b) ~2
c) ~1
d) 6
View Answer
Explanation: S is the number of steps required to execute the instructions.
14. CISC stands for _______
a) Complete Instruction Sequential Compilation
b) Computer Integrated Sequential Compiler
c) Complex Instruction Set Computer
d) Complex Instruction Sequential Compilation
View Answer
Explanation: CISC is a type of system architecture where complex instructions are grouped together and executed to improve system performance.
15. As of 2000, the reference system to find the SPEC rating are built with _____ Processor.
a) Intel Atom SParc 300Mhz
b) Ultra SPARC -IIi 300MHZ
c) Amd Neutrino series
d) ASUS A series 450 Mhz
View Answer
Explanation: None.
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