This set of Computer Organization and Architecture Multiple Choice Questions & Answers (MCQs) focuses on “Multiple BUS Organistaion”.
1. The general purpose registers are combined into a block called as ______
a) Register bank
b) Register Case
c) Register file
d) None of the mentioned
View Answer
Explanation: To make the access of the registers easier, we classify them into register files.
2. In ______ technology, the implementation of the register file is by using an array of memory locations.
a) VLSI
b) ANSI
c) ISA
d) ASCI
View Answer
Explanation: By doing so the access of the registers can be made faster.
3. In a three BUS architecture, how many input and output ports are there?
a) 2 output and 2 input
b) 1 output and 2 input
c) 2 output and 1 input
d) 1 output and 1 input
View Answer
Explanation: That is enabling reading from two locations and writing into one.
4. For a 3 BUS architecture, is the below code correct for adding three numbers?
PCout, R = B, Marin, READ, Inc PC WMFC MDRout, R = B, IRin R4outa, R5outb, Select A, ADD, R6in, End
a) True
b) False
View Answer
Explanation: We have assumed the names of the three BUSes have A, B and C.
5. The main advantage of multiple bus organisation over a single bus is __________
a) Reduction in the number of cycles for execution
b) Increase in size of the registers
c) Better Connectivity
d) None of the mentioned
View Answer
Explanation: None.
6. CISC stands for _________
a) Complete Instruction Sequential Compilation
b) Computer Integrated Sequential Compiler
c) Complex Instruction Set Computer
d) Complex Instruction Sequential Compilation
View Answer
Explanation: The CISC machines are well adept at handling multiple BUS organisation.
7. If the instruction Add R1, R2, R3 is executed in a system which is pipelined, then the value of S is (Where S is term of the Basic performance equation).
a) 3
b) ~2
c) ~1
d) 6
View Answer
Explanation: The value will be much lower in case of multiple BUS organisation.
8. In multiple BUS organisation __________ is used to select any of the BUSes for input into ALU.
a) MUX
b) DE-MUX
c) En-CDS
d) None of the mentioned
View Answer
Explanation: The MUX can be used to either select the BUS or to increment the PC.
9. There exists a separate block consisting of various units to decode an instruction.
a) True
b) False
View Answer
Explanation: This block is used to decode the instruction and place it in the IR.
10. There exists a separate block to increment the PC in multiple BUS organisation.
a) True
b) False
View Answer
Explanation: None.
Sanfoundry Global Education & Learning Series – Computer Organisation and Architecture.
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