This set of Computer Organization and Architecture Multiple Choice Questions & Answers (MCQs) focuses on “PCI BUS-2”.
1. A complete transfer operation over the BUS, involving the address and a burst of data is called _____
a) Transaction
b) Transfer
c) Move
d) Procedure
View Answer
Explanation: None.
2. The device connected to the BUS are given addresses of ____ bit.
a) 24
b) 64
c) 32
d) 16
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Explanation: Each of the devices connected to the BUS will be allocated an address during the initialization phase.
3. The PCI BUS has _____ interrupt request lines.
a) 6
b) 1
c) 4
d) 3
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Explanation: The interrupt request lines are used by the devices connected to raise the interrupts.
4. _____ signal is sent by the initiator to indicate the duration of the transaction.
a) FRAME#
b) IRDY#
c) TMY#
d) SELD#
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Explanation: The FRAME signal is used to indicate the time required by the device.
5. ______ signal is used to enable commands.
a) FRAME#
b) IRDY#
c) TMY#
d) c/BE#
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Explanation: The signal is used to enable 4 command lines.
6. IRDY# signal is used for _______
a) Selecting the interrupt line
b) Sending an interrupt
c) Saying that the initiator is ready
d) None of the mentioned
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Explanation: The initiator transmits this signal to tell the target that it is ready.
7. The signal used to indicate that the slave is ready is _____
a) SLRY#
b) TRDY#
c) DSDY#
d) None of the mentioned
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Explanation: None.
8. DEVSEL# signal is used _________
a) To select the device
b) To list all the devices connected
c) By the device to indicate that it is ready for a transaction
d) None of the mentioned
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Explanation: This is signal is activated by the device after it as recognized the address and commands put on the BUS.
9. The signal used to initiate device select ________
a) IRDY#
b) S/BE
c) DEVSEL#
d) IDSEL#
View Answer
Explanation: This signal is used to initialization of device select.
10. The PCi BUS allows us to connect _______ I/O devices.
a) 21
b) 13
c) 9
d) 11
View Answer
Explanation: The PCI BUS allows only 21 devices to be connected as only the higher order 21 bits of the 32 bit address space is used to specify the device.
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