This set of Embedded Systems Multiple Choice Questions & Answers (MCQs) focuses on “The Sun SPARC RISC Model”.
1. What does SPARC stand for?
a) scalable processor architecture
b) speculating architecture
c) speculating processor
d) scaling Pentium architecture
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Explanation: SPARC was designed for optimizing compilers and easily pipelined hardware implementations and it can license by anyone that is, having a nonproprietary architecture which is used to develop various microprocessors.
2. How many bits does SPARC have?
a) 8
b) 16
c) 32
d) 64
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Explanation: It is a 32 bit RISC architecture having 32-bit wide register bank.
3. Which company developed SPARC?
a) intel
b) IBM
c) Motorola
d) sun microsystem
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Explanation: SPARC is developed by Sun Microsystem but different manufacturers from other companies like Intel, Texas worked on it.
4. What improves the context switching and parameter passing?
a) register windowing
b) large register
c) stack register
d) program counter
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Explanation: SPARC follows Berkeley architecture model and uses register windowing in order to improve the context switching and parameter passing. It also supports superscalar operations.
5. How many external interrupts does SPARC processor support?
a) 5
b) 10
c) 15
d) 20
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Explanation: SPARC processor provides 15 external interrupts which are generated by the interrupt lines IRL0-IRL3.
6. Which level is an in-built nonmaskable interrupt in SPARC processor?
a) 15
b) 14
c) 13
d) 12
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Explanation: The level 15 of the SPARC processor is assigned to be a nonmaskable interrupt and the remaining 14 levels are unmasked and if necessary they can be made maskable.
7. How many instructions does SPARC processor have?
a) 16
b) 32
c) 64
d) 128
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Explanation: The instruction set of SPARC processor have 64 instructions which can be accessed by load and store operation with a RISC architecture.
8. What is generated by an external interrupt in SPARC?
a) internal trap
b) external trap
c) memory trap
d) interfaced trap
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Explanation: In SPARC when an external interrupt is generated, an internal trap is created in the trap base register in which the current and next instructions are saved, the pipeline gets flushed and the processor turns into a supervisor mode.
9. When an external interrupt is generated, what type of mode does the processor supports?
a) real mode
b) virtual mode
c) protected mode
d) supervisor mode
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Explanation: In SPARC when an external interrupt is called, it creates an internal trap in which the current and next instructions get saved and mode of the processor switches to supervisor mode.
10. Where is trap vector table located in SPARC processor?
a) program counter
b) Y register
c) status register
d) trap base register
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Explanation: The trap vector table is located in the trap base register which supplies the address of the service routine. When it is completed REIT instructions are executed.
11. How many bits does SPARC-V9 processor have?
a) 16
b) 32
c) 64
d) 128
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Explanation: There are three major versions of SPARC which are SPARC-V7, SPARC-V8 and SPARC-V9. The former two are 32 bits processor and the later is a 64-bit processor.
12. What are the three modules in the SPARC processor?
a) IU, FPU, CU
b) SP, DI, SI
c) AX, BX, CX
d) CU, CH, CL
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Explanation: The SPARC processor has three modules which are Integer unit, Floating point unit, and coprocessor unit. Each module has its own functions and integer unit controls the overall operation of the processor.
13. How many floating point register does the FPU of the SPARC have?
a) 16 128-bit
b) 32 128-bit
c) 64 128-bit
d) 10 128-bit
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Explanation: It possesses 32 32-bit single precision, 32 64-bit double precision and 16 128-bit quads precise floating registers.
14. Which module of SPARC contains the general purpose registers?
a) IU
b) FPU
c) CU
d) control unit
View Answer
Explanation: Integer unit contains the general purpose registers and it controls the overall operation and performance of the processor and the memory address is also calculated by the integer unit.
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