This set of Embedded Systems test focuses on “RISC Exceptions-II”.
1. Which of the following can be done to ensure that all interrupts are recognised?
a) reset pin
b) external ready pin
c) handshaking
d) acknowledgment
View Answer
Explanation: The exception handler performs some kind of handshaking to ensure that all the interrupts are recognised.
2. How many types of exceptions are associated with the asynchronous imprecise?
a) 1
b) 2
c) 3
d) 4
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Explanation: Two types of exceptions are associated with the asynchronous imprecise. These are system reset and machine checks.
3. How is the internal registers and memories are reset?
a) system reset
b) memory reset
c) peripheral reset
d) software reset
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Explanation: By doing the system reset, all the current processing are stopped and the internal registers and the memories are reset.
4. How is the machine check exception is taken in an asynchronous imprecise?
a) ME bit
b) EE bit
c) FE0
d) FE1
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Explanation: The machine check exception is taken only if the ME bit of the MSR is set. If it is cleared, the processor will enter into a check stop state.
5. Which of the following are the exceptions associated with the asynchronous imprecise?
a) decrementer interrupt
b) machine check
c) instruction dependent
d) external interrupt
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Explanation: The machine check and the system reset are two types of exceptions which are associated with the asynchronous imprecise.
6. Which of the following possesses an additional priority?
a) asynchronous precise
b) asynchronous imprecise
c) synchronous precise
d) synchronous imprecise
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Explanation: The synchronous precise exceptions provide additional priority because it is possible for an instruction to generate more than one exception.
7. Which of the following has more priority?
a) system reset
b) machine check
c) external interrupt
d) decrementer interrupt
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Explanation: The system reset has the first priority then comes the machine reset, next priority moves for the instruction dependent, and the next priority is an external interrupt, and last priority level goes for the decrementer interrupt.
8. Which bit controls the external interrupts and the decrementer exceptions?
a) FE1
b) FE0
c) EE
d) ME
View Answer
Explanation: The EE bit in the MSR controls the external interrupts and the decrementer exceptions.
9. Which bit controls the machine check exceptions?
a) ME
b) FE0
c) FE1
d) EE
View Answer
Explanation: The ME bit in the MSR controls the machine check interrupts.
10. Which bits control the floating point exceptions?
a) EE
b) FE0
c) FE1
d) both FE1 and FE2
View Answer
Explanation: The FE0 and FE1 control the floating point exceptions.
11. Which of the following is a 16 kbyte block?
a) register
b) vector table
c) buffer
d) lookaside buffer
View Answer
Explanation: The vector table is a 16 kbyte block which is divided into 256 byte divisions in which each division is allocated for particular exceptions and it also contains the handler routine associated with the exceptions.
Sanfoundry Global Education & Learning Series – Embedded System.
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