This set of Microelectronics Multiple Choice Questions & Answers (MCQs) focuses on “Bipolar Amplifiers – Comparison of Biasing Methods – Set 2”.
1. In the following circuit, we want negligible current entering the base. Choose the correct situation to reach this.
a) VCC/(R1 + R2) >> IB
b) Not possible
c) VCC/(R1 + R2) = IB
d) VCC/(R1 + R2) << IB
View Answer
Explanation: If VCC/(R1 + R2) >> IB, we can readily say that most of the current has flown through R2 while an almost negligible current flows into the base. Note that this condition is achieved if R2 is very less.
2. Calculate the internal resistance of the circuit in presence of early effect.
a) rπ
b) R2||rπ
c) 1K||R2||rπ
d) 1K||R2
View Answer
Explanation: The small signal model of Q1 is invoked to find the input resistance of the above circuit. We note that the 1k and R2 are in parallel to each other. This leaves us with rπ and this is in parallel to 1K||R2 Hence, the overall resistance is 1K||R2.
3. What is the output resistance (at the collector) in absence of early effect?
a) R1
b) Infinite
c) 0
d) 2*R1
View Answer
Explanation: The output resistance is simply R1 in absence of early effect. We calculate the output resistance at the collector by performing a Thevenin equivalent at the collector node and this leads us to the output resistance which is R1
4. In the following circuit, the collector current is 3mA. We assume that the base current is negligible but IS=10-16A. What is the value of R2?
a) 210Ω
b) 500Ω
c) 240Ω
d) 200Ω
View Answer
Explanation: A collector current of mA readily implies that the transistor is working in the saturation region. The base-emitter voltage required is found from the relation IC=IS*exp(VBE/VT), where VT is 26mV, and it turns out to be 0.8V. If the base current is negligible, it implies that the voltage drop across R2 is the total base-emitter voltage and this voltage is VCC*(R2/(1K + R2)). Thus we find R2=200Ω.
5. The voltage-divider bias offers a high stable collector current with respect to changes in the base-emitter voltage compared to the base-bias stages.
a) True
b) False
View Answer
Explanation: The base-emitter voltage is kept almost constant by this biasing method. The base-bias stage is prone to changes in the base voltage. In this case, the base voltage is kept constant by choosing proper resistances for biasing the device.
6. In the following circuit, β=1. If R1=1KΩ find R4 such that IC=1mA & VCE=2V.
a) 2KΩ
b) 1KΩ
c) 3KΩ
d) 4KΩ
View Answer
Explanation: Firstly, we note that the current gain is 1 and hence IC=IE. We simply write a KVL as follows: VCC = IC * RC + VCE + IE * RE and thereby we obtain RE as 2KΩ.
7. In the following circuit, β=1 & VCCE(Sat.)=0.2V. Find RC=RE such that the transistor remains at the edge saturation.
a) 3.2KΩ
b) 2.2KΩ
c) 1.8KΩ
d) 1.2KΩ
View Answer
Explanation: We use KVL to write VCC = IC * RC + VCE + IE * RE. Hence, to remain at the edge of saturation- the value of the resistance is 1.2KΩ.
8. The voltage-divider biasing method provides less stable collector current, with respect VBE, compared to the voltage-divider biasing method with emitter degeneration.
a) True
b) False
View Answer
Explanation: The voltage-divider biasing method offers a good stable collector current but if the base voltage gets changed, due to noise, it cannot be compensated. With degeneration, the emitter voltage compensates for this fluctuation and thus we get a more stable collector current.
9. Neglecting early effect, what is Rin if the input is placed at the base?
a) RC
b) Rf
c) {1-(1/Rf–gm)*(Rf||RC)}/Rf
d) Infinite
View Answer
Explanation: We invoke the small signal model of the transistor to find Rin. We use KCL at X and obtain the voltage at X. Do note that RC=R2.
Observe that VIN-VXX/RF=IIN and hence, we conclude that the input resistance is {1-(1/Rf–gm)*(Rf||RC)}/Rf.
10. Neglecting early effect, what is Rout if the input is placed at the base?
a) R2||Rf
b) 0
c) Infinite
d) (Rf||R2)
View Answer
Explanation: The output resistance is calculated at the collector node by using a Thevenin equivalent. Now we find that Rf & R2 are in parallel and hence the output resistance is R2||Rf.
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