Digital Circuits Questions and Answers – Introduction of Memory Devices – 2

This set of Digital Electronic/Circuits assessment questions focuses on “Introduction of Memory Devices-2”.

1. The full form of ROM is __________
a) Read Outside Memory
b) Read Out Memory
c) Read Only Memory
d) Read One Memory
View Answer

Answer: c
Explanation: The full form of ROM is Read Only Memory.

2. ROM consist of __________
a) NOR and OR arrays
b) NAND and NOR arrays
c) NAND and OR arrays
d) NOR and AND arrays
View Answer

Answer: c
Explanation: ROM consists of NAND and OR arrays which can be programmed by the user to implement combinational & sequential functions. Combinational Operations like that of adders and subtractors and Sequential Functions like that of storing in the memory.

3. For reprogrammability, PLDs use __________
a) PROM
b) EPROM
c) CDROM
d) PLA
View Answer

Answer: b
Explanation: For reprogrammability, PLDs use EPROM (i.e. Erasable PROM). It erases the previous program and starts uploading a new one. However, data is erased by exposing it to UV-light, which is a tedious and time-consuming process.
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4. The full form of PROM is __________
a) Previous Read Only Memory
b) Programmable Read Out Memory
c) Programmable Read Only Memory
d) Previous Read Out Memory
View Answer

Answer: c
Explanation: The full form of PROM is Programmable Read Only Memory, where the ROM can be programmed by the user.

5. The full form of EPROM is __________
a) Easy Programmable Read Only Memory
b) Erasable Programmable Read Only Memory
c) Eradicate Programmable Read Only Memory
d) Easy Programmable Read Out Memory
View Answer

Answer: b
Explanation: The full form of EPROM is Erasable Programmable Read Only Memory, where the ROM can be erased and re-used by the user.
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6. PLDs with programmable AND and fixed OR arrays are called __________
a) PAL
b) PLA
c) APL
d) PPL
View Answer

Answer: a
Explanation: PLDs with programmable AND and fixed OR arrays are called PAL (i.e. Programmable Array Logic). However, PAL is less flexible but has higher speed.

7. When both the AND and OR are programmable, such PLDs are known as __________
a) PAL
b) PPL
c) PLA
d) APL
View Answer

Answer: c
Explanation: When both the AND and OR are programmable, such PLDs are known as PLA (i.e. Programmable Logic Array). However, PLA is more flexible but has less speed.
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8. ASIC stands for __________
a) Application Special Integrated Circuits
b) Applied Special Integrated Circuits
c) Application Specific Integrated Circuits
d) Applied Specific Integrated Circuits
View Answer

Answer: c
Explanation: In digital electronics, ASIC stands for Application Specific Integrated Circuits. It is a customized integrated circuit which is produced for a specific use and not for a common-purpose.

9. The programmability and high density of PLDs make them useful in the design of __________
a) ISAC
b) ASIC
c) SACC
d) CISF
View Answer

Answer: b
Explanation: The programmability and high density of PLDs make them useful in the design of ASIC (i.e. Application Specific Integrated Circuits) where design changes can be more rapidly and inexpensively.
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10. FPGA stands for __________
a) Full Programmable Gate Array
b) Full Programmable Genuine Array
c) First Programmable Gate Array
d) Field Programmable Gate Array
View Answer

Answer: d
Explanation: In digital electronics, FPGA stands for Field Programmable Gate Array. This type of integrated circuit is for general-purpose which is configured by the user as per their requirement.

11. Which of the following is a reprogrammable gate array?
a) EPROM
b) FPGA
c) Both EPROM and FPGA
d) ROM
View Answer

Answer: c
Explanation: Both FPGA and EPROM are reprogrammable gate array.

12. The difference between FPGA and PLD is that __________
a) FPGA is slower than PLD
b) FPGA has high power dissipation
c) FPGA incorporates logic blocks
d) All of the Mentioned
View Answer

Answer: c
Explanation: The difference between FPGA and PLD is that FPGA incorporates logic blocks instead of fixed AND-OR gates and is faster with low power dissipation. FPGAs are designed for having higher gate count whereas, PLDs are used for lesser gate counts.

Sanfoundry Global Education & Learning Series – Digital Circuits.

To practice assessment questions on all areas of Digital Electronic Circuits, here is complete set of 1000+ Multiple Choice Questions and Answers.

If you find a mistake in question / option / answer, kindly take a screenshot and email to [email protected]

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Manish Bhojasia, a technology veteran with 20+ years @ Cisco & Wipro, is Founder and CTO at Sanfoundry. He lives in Bangalore, and focuses on development of Linux Kernel, SAN Technologies, Advanced C, Data Structures & Alogrithms. Stay connected with him at LinkedIn.

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