FACTS Questions and Answers – Power Semiconductor Devices – Thyristor, GTO and MTO – Set 2

This set of FACTS Multiple Choice Questions & Answers (MCQs) focuses on “Power Semiconductor Devices – Thyristor, GTO and MTO – Set 2”.

1. In GTO, buffer layer is ________
a) provided on the anode side of the n-layer
b) provided on the cathode side of the n-layer
c) provided on the anode side of the p-layer
d) not provided
View Answer

Answer: a
Explanation: In GTO, buffer layer is definitely provided. The buffer layer is fabricated on the anode side of the n-layer. This decreases the on-state conduction losses.

2. ETO is a symmetrical device.
a) True
b) False
View Answer

Answer: b
Explanation: ETO is NOT a symmetrical device. It is fabricated as an asymmetrical device. An ETO on its structural analysis reveals that both n-type MOSFETs and p-type MOSFETs are fabricated in it.

3. MTO is a symmetrical device.
a) True
b) False
View Answer

Answer: b
Explanation: MTO is NOT a symmetrical device. It is designed as an asymmetrical device. An MTO on its structural analysis reveals that both npn transistor and pnp transistor are fabricated in it.
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4. GTO is a symmetrical device.
a) True
b) False
View Answer

Answer: b
Explanation: GTO is NOT a symmetrical device. It exhibits the property of an asymmetrical device. GTO provides improved performance with appreciable reduction in system costs.

5. The GTO employed in MTO is characterized with ________
a) high voltage and high current capabilities
b) low voltage and low current capabilities
c) low voltage and high current capability
d) high voltage and low current capability
View Answer

Answer: a
Explanation: The GTO employed in MTO is characterized with high voltage and high current capabilities. The inherent high voltage handling ability of GTO ranges up to 10 kV. The inherent high current handling ability of GTO ranges up to 4000 A.

6. The MOS structure in MTO is fabricated on its total device surface.
a) True
b) False
View Answer

Answer: b
Explanation: The MOS structure in MTO is NOT fabricated on its total device surface. Structurally the MOSFETs are fabricated on the silicon wafer of MTO, surrounding the GTO. This is done to eliminate need for high-current turning-off pulses.

7. GTO requires considerably smaller gate drive
a) True
b) False
View Answer

Answer: a
Explanation: GTO requires considerably smaller gate drive. It exhibits reduced charge storage time on turning-off. GTO is fabricated with double-sided cooling.
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8. Small turn-off time is looked for in fabrication of any turn-off power electronic device.
a) True
b) False
View Answer

Answer: a
Explanation: Small turn-off time is looked for in fabrication of any turn-off power electronic device. This leads to high dv/dt with less switching losses. Also it call for much smaller capacitors in snubber circuits and even elimination of the resistor in snubber circuits.

9. In MTO, buffer layer is ________
a) fabricated on the anode side of the n-layer
b) fabricated on the cathode side of the n-layer
c) fabricated on the anode side of the p-layer
d) not fabricated
View Answer

Answer: a
Explanation: In GTO, buffer layer is definitely fabricated. The buffer layer is provided on the anode side of the n-layer. This, in turn, decreases the on-state conduction losses.
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10. Small turn-off time is encouraged for MTO fabrication.
a) True
b) False
View Answer

Answer: a
Explanation: Small turn-off time is encouraged for MTO fabrication. This indicates that an MTO can be connected in series without matching of devices. It can happen as virtually all devices turning- off simultaneously result in sharing of current in all devices.

11. To turn off an MTO, application of________
a) a voltage pulse is given to the MOSFET gate
b) a current pulse is given to the MOSFET gate
c) a voltage pulse is given to the npn transistor
d) a voltage pulse is given to the pnp transistor
View Answer

Answer: a
Explanation: To turn off an MTO, application of a voltage pulse is given to the MOSFET gate. This voltage pulse is of about 15 volts. It is used to turn-on the MOSFET which helps to shunt of the latching process.

12. MTO employs ________ for turning-on.
a) npn transistor
b) no transistor
c) pnp transistor
d) both npn transistor and pnp transistor
View Answer

Answer: d
Explanation: MTO employs both npn transistor and pnp transistor for turning-on. In MTO, turning-on pulse first turns on the npn transistor. This in turn turns on the pnp transistor. Thus the MTO is latched on.

13. To turn-on an MTO, ________ pulse is required.
a) a turn-on current
b) a turn-on voltage
c) a turn-on current or a turn-on voltage
d) both turn-on current and turn-on voltage
View Answer

Answer: a
Explanation: To turn-on an MTO, a turn-on current pulse is required. A turn-on current pulse of about one tenth of the main current for 5-10 microsec is actually required. It is generally followed by a small back-porch current.

14. ________ both the thyristor and the transistor in its structure.
a) ETO incorporates
b) MTO incorporates
c) Both MTO and ETO incorporate
d) Neither MTO nor ETO incorporates
View Answer

Answer: c
Explanation: Both MTO and ETO incorporate both the thyristor and the transistor in its structure. Both MTO and ETO include GTO and MOSFET. GTO is a thyristor while MOSFET is a transistor.

15. In ETO, buffer layer is ________
a) made-up on the anode side of the n-layer
b) made-up on the cathode side of the n-layer
c) made-up on the anode side of the p-layer
d) not made-up
View Answer

Answer: a
Explanation: In GTO, buffer layer is definitely made-up with precision. The buffer layer is provided on the anode side of the n-layer. This, in turn, decreases the on-state conduction losses.

Sanfoundry Global Education & Learning Series – Flexible AC Transmission System (FACTS).

To practice all areas of Flexible AC Transmission System (FACTS), here is complete set of 1000+ Multiple Choice Questions and Answers.

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Manish Bhojasia, a technology veteran with 20+ years @ Cisco & Wipro, is Founder and CTO at Sanfoundry. He lives in Bangalore, and focuses on development of Linux Kernel, SAN Technologies, Advanced C, Data Structures & Alogrithms. Stay connected with him at LinkedIn.

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