VHDL Questions and Answers – Package

This set of VHDL Multiple Choice Questions & Answers (MCQs) focuses on “Package”.

1. Which of the following is true about packages?
a) Package is collection of libraries
b) Library is collection of packages
c) Package is collection of entities
d) Entity is collection of packages
View Answer

Answer: b
Explanation: A library contains many packages and it is used to collect and describe elements that can be shared globally among all the design units. It may contain any commonly used data type, functions or constants.

2. A package may consist of _________ design units.
a) 2
b) 3
c) 4
d) 5
View Answer

Answer: a
Explanation: A package may consist of two separate design units which are package declaration and package body. Package declaration is necessary part for any package whereas package body is an optional part. Package declaration, like entity declaration, describes the interface of the design and package body is similar to architecture in the VHDL code.

3. Any item declared in a package declaration section are visible to _______
a) Every design unit
b) Package body only
c) Library containing that package
d) Design unit that USE the package
View Answer

Answer: d
Explanation: To use any component, constant, signal, subprogram or function declared in a package, one needs to declare the package in the code itself by using the USE clause. When the package is declared in the library declaration part of the code then the functions or datatypes defined in the package will be visible to the design unit.
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4. What do you call a constant declared in the package declaration, without its initial value specified?
a) Constant
b) Package constant
c) Deferred constant
d) Undefined constant
View Answer

Answer: c
Explanation: Deferred constants are constants that have their name and type declared in the package declaration section but the actual value is specified in the package body section. It is important to use package body when a deferred constant is declared in the package declaration body.

5. Which of the following is the correct syntax to declare a package?
a)

     PACKAGE package_name IS
     declarations;
     END package_name;
     PACKAGE BODY package_name IS
     Functions and procedures descriptions;
     END package_name;

b)

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     PACKAGE package_name IS
     declarations;
     PACKAGE BODY package_body_name IS
     Functions and procedures descriptions;
     END package_name;

c)

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     PACKAGE package_name IS
     declarations;
     END package_name;
     PACKAGE BODY package_body_name IS
     Functions and procedures descriptions;
     END package_name;

d)

     PACKAGE package_name IS
     declarations;
     PACKAGE BODY package_name IS
     Functions and procedures descriptions;
     END package_name;
View Answer
Answer: a
Explanation: The PACKAGE keyword is followed by the name of package and after which there is an declaration part of the package. If any subprogram or deferred constant is declared in the package declaration, then a package body must be defined. Note that the package body doesn’t have a separate name. It uses the same name as that of package.
 
 

6. How to use a package in a VHDL design unit?
a)

USE PACKAGE package_name.part;

b)

    LIBRARY library_name;
    USE package_name.part;

c)

    LIBRARY library_name;
    USE library_name.package_name.part;

d)

USE library_name.package_name;
View Answer
Answer: c
Explanation: To use a package, first we want to define the library in which it is actually declared. After that to use the package, we need to use the USE clause which is followed by library name and the package name and then the part of package which we need to include to the design.
 
 

7. It is possible to use hierarchical libraries in VHDL.
a) True
b) False
View Answer

Answer: b
Explanation: VHDL doesn’t support hierarchical libraries. A VHDL library can consist of packages, entities, architectures, configurations but not libraries. We can have as many libraries as we want, but we cannot nest them.

8. Which of the following package is not synthesizable?
a)

     PACKAGE my_pack IS
     SIGNAL x : IN std_logic;
     END my_pack;

b)

    PACKAGE my_pack IS
    CONSTANT x : INTEGER := 5;
     END my_pack;

c)

     PACKAGE my_pack IS
     FUNCTION my_func RETURN BOOLEAN IS;
     END my_pack;
     PACKAGE BODY my_pack IS
     Function description;
     END my_pack;

d)

    PACKAGE my_pack IS
    TYPE color IS (red, green, blue);
    END PACKAGE;
View Answer
Answer: a
Explanation: Though it is possible to use and declare signals in packages but signal declaration may cause some problems in synthesis because a signal can’t be shared by two entities. However, it is possible to declare global signals in the design itself.
 
 

9. Among which of the following, it is necessary to declare a package body?
a)

     PACKAGE my_pack IS
     SIGNAL x : IN std_logic;
     END my_pack;

b)

    PACKAGE my_pack IS
    CONSTANT x : INTEGER := 5;
     END my_pack;

c)

     PACKAGE my_pack IS
     FUNCTION my_func RETURN BOOLEAN IS;
     END my_pack;

d)

    PACKAGE my_pack IS
    TYPE color IS (red, green, blue);
    END PACKAGE;
View Answer
Answer: c
Explanation: Package declaration is always mandatory but package body is optional. When a function or deferred constant is declared in the package declaration, then it is necessary to use a package body so as to assign value to the constant or to describe the function.
 
 

10. It is possible to include another package in a package.
a) True
b) False
View Answer

Answer: a
Explanation: Though it is not possible to nest libraries in VHDL but it is possible to nest packages. One can make use of another package inside a package by USE clause. In the package declaration, USE may be used to include another packages.

11. Which of the following is not a in-built package in VHDL?
a) STD_LOGIC_1164
b) TEXTIO
c) STANDARD
d) STD
View Answer

Answer: d
Explanation: STD is not a package but it is a library. All other STD_LOGIC_1164, TEXTIO, STANDARD etc. are some in built packages of VHDL. STD_LOGIC_1164 is declared in the IEEE library. TEXTIO and STANDARD libraries are declared in STD library.

12. If a user wants to include his/her own package in the body, which library he/she must use?
a) STD
b) IEEE
c) WORK
d) STD_LOGIC
View Answer

Answer: c
Explanation: WORK is a library which can be used to store and use user-defined packages. Similar to other libraries, it is also declared in the same manner by using LIBRARY keyword and to declare the package, USE clause is used.

13. Packages increases _______ of the code.
a) Reusability
b) Readability
c) Managing
d) Resolution
View Answer

Answer: a
Explanation: Since packages can be used again and again in the different design units. So, same data types, functions, subprograms, constants can be used many times without any declaration. So, packages increase the reusability of the code.

14. It is possible to modify the STD_LOGIC_1164 package of IEEE library.
a) True
b) False
View Answer

Answer: b
Explanation: The STD_LOGIC_1164 package has been developed and standardized by IEEE and only IEEE has rights to modify the package. User is not allowed to add or remove something from the package. It can only be included in the designs.

15. Which of the following can’t have multiple assignments or drivers?
a) STD_LOGIC
b) INTEGER
c) STD_ULOGIC
d) BIT
View Answer

Answer: c
Explanation: The resolving functions for all except STD_ULOGIC has been defined in the respective packages. Only STD_ULOGIC is of unresolved type. So, multiple values can’t be assigned to the STD_ULOGIC type since there is no means of resolving the value.

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Manish Bhojasia, a technology veteran with 20+ years @ Cisco & Wipro, is Founder and CTO at Sanfoundry. He lives in Bangalore, and focuses on development of Linux Kernel, SAN Technologies, Advanced C, Data Structures & Alogrithms. Stay connected with him at LinkedIn.

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