This set of Tricky VHDL Questions and Answers focuses on “Implementing Logic Functions with VHDL – 2”.

1. What do you use to perform basic logic functions in VHDL while creating concurrent code?

a) Operators

b) If statement

c) PROCESS

d) GENERATE

View Answer

Explanation: Operators are the most basic ways of creating concurrent code. These operators may be logical, arithmetic, shift operators or so on. Generally, logical operators are used in logic functions.

2. In the implementation of following function by using NAND keyword only, can be done in _____ operations.

X = A'B + AB'

a) 2

b) 3

c) 4

d) 5

View Answer

Explanation: The given logic function resembles the export operation. An EXOR gate can be implemented by using 4 NAND operations. Therefore, the NAND keyword will be used 4 times in implementation of this function.

3. The maximum number of parameters in port map() function while implementing logic function using gates only, is equal to ____________

a) Number of inputs

b) Number of outputs

c) Number of inputs + number of outputs

d) Infinite

View Answer

Explanation: A port map function is used in structural modeling in which we use port map fumction to map a given structure. The parameters of port map identify the inputs and outputs of the circuit respectively starting from the left. Therefore, a port map can have maximum parameters as the sum of number of inputs and outputs of the port.

4. Which of the following is not representing a nibble?

a) x<= “0101”

b) x<= STD_LOGIC_VECTOR (0 TO 4)

c) x<= STD_LOGIC_VECTOR(3 DOWNTO 0)

d) x<= BIT_VECTOR (1 TO 4)

View Answer

Explanation: A nibble is a group of 4 bits. In case of option x<= “0101”, it is clear that x is a group of 4 bits. Similarly in x<= STD_LOGIC_VECTOR(3 DOWNTO 0) and x<= BIT_VECTOR (1 TO 4), we have four bits. But, in option x<= STD_LOGIC_VECTOR (0 TO 4), we have 5 bits from 0 to 4. Therefore, option x<= STD_LOGIC_VECTOR (0 TO 4) is not a nibble.

5. In designing logic functions in VHDL, we can use arithmetic operators.

a) True

b) False

View Answer

Explanation: It is completely legal to use arithmetic operator in implementation of a logic or Boolean function. We can obviously use arithmetic operators like +, -, * etc. in the logic functions, if required. It will not contain any error.

6. A “Multiplication by 2” logic is to be designed by using the VHDL code, which of the following operator can be used to implement the same?

a) SRL

b) SRA

c) SLA

d) SLL

View Answer

Explanation: In binary number system, when we multiply a number by 2, it shifts one position to the left. For example, 4(0100), when multiplied by 2, it becomes 8(1000). So, it is clear that one can easily make multiplication by 2 logic by using a single operator called SLL or Shift Left Logical.

7. What kind of logic is represented by the given code?

ARCHITECTURE my_func OF my_logic IS BEGIN y <= x SRL 2; END my_func;

a) Divide by 2

b) Divide by 4

c) Multiply by 2

d) Multiply by 4

View Answer

Explanation: Since the code is using a shift right operator, therefore, it must be something to be divided. So, x is divided here and the result is stored in y. Here, the x is shifted to 2 positions right, which means that it is a divide by 4 (= 2

^{2}) logic.

8. What information is not provided by the given logic’s output?

ARCHITECTURE my_func OF my_logic IS BEGIN y <= x SRL 2; END my_func;

a) Result of the operation

b) Operands used

c) Remainder of the operation

d) Everything about the operation will be determined

View Answer

Explanation: Because only a shift operator is used this will act as divide by 4 logic. But, if there is any remainder of the operation, that can’t be determined by the output. For that purpose a statement with REM operator must be used.

9. A user wants to implement a logic by using VHDL. In which he has inputs from two sensors which are smoke sensor and water level detector. If any input is high, he has to turn on the respective alarm. Which of the following is representing the correct code for the given logic?

a)

ARCHITECTURE alarm_control OF my_home IS BEGIN PROCESS(smoke_sensor, water_sensor) BEGIN IF(smoke_sensor = ‘1’) THEN fire_alarm = ‘1’; ELSE fire_alarm = ‘0’; END IF; IF(water_sensor = ‘1’) THEN water_alarm = ‘1’; ELSE water_alarm = ‘0’; END IF; END PROCESS; END alarm_control;

b)

ARCHITECTURE alarm_control OF my_home IS BEGIN PROCESS(smoke_sensor, water_sensor) BEGIN IF(smoke_sensor = ‘1’) THEN fire_alarm = ‘1’; ELSE fire_alarm = ‘0’; END IF; IF(water_sensor = ‘1’) THEN water_alarm = ‘0’; ELSE water_alarm = ‘1’; END IF; END PROCESS; END alarm_control;

c)

ARCHITECTURE alarm_control OF my_home IS BEGIN PROCESS(smoke_sensor, water_sensor) BEGIN IF(smoke_sensor = ‘1’) THEN fire_alarm = ‘0’; ELSE fire_alarm = ‘1’; END IF; IF(water_sensor = ‘1’) THEN water_alarm = ‘1’; ELSE water_alarm = ‘0’; END IF; END PROCESS; END alarm_control;

d)

ARCHITECTURE alarm_control OF my_home IS BEGIN PROCESS(smoke_sensor, water_sensor) BEGIN IF(smoke_sensor = ‘0’) THEN fire_alarm = ‘1’; ELSE fire_alarm = ‘0’; END IF; IF(water_sensor = ‘0’) THEN water_alarm = ‘1’; ELSE water_alarm = ‘0’; END IF; END PROCESS; END alarm_control;

Explanation: When the input to the controller is high from any of the sensor, then the respective alarm status should be high. This can be easily implemented by using IF control statements. So, by using IF statement, one can set the fire alarm if smoke sensor is giving a high input. Otherwise, water level detector will turn the water alarm on.

10. Optimized implementation of Boolean functions reduces the cost of implementation.

a) True

b) False

View Answer

Explanation: By using a suitable method for optimization, the number of prime implicants will be reduced and hence less number of logical operations need to be performed in the VHDL code. This reduction will reduce the cost of implementation.

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