This set of Operating System Multiple Choice Questions & Answers (MCQs) focuses on “Memory Management – Paging”.
1. Physical memory is broken into fixed-sized blocks called ________
a) frames
b) pages
c) backing store
d) none of the mentioned
View Answer
Explanation: None.
2. Logical memory is broken into blocks of the same size called _________
a) frames
b) pages
c) backing store
d) none of the mentioned
View Answer
Explanation: None.
3. Every address generated by the CPU is divided into two parts. They are ____________
a) frame bit & page number
b) page number & page offset
c) page offset & frame bit
d) frame offset & page offset
View Answer
Explanation: None.
4. The __________ is used as an index into the page table.
a) frame bit
b) page number
c) page offset
d) frame offset
View Answer
Explanation: None.
5. The _____ table contains the base address of each page in physical memory.
a) process
b) memory
c) page
d) frame
View Answer
Explanation: None.
6. The size of a page is typically ____________
a) varied
b) power of 2
c) power of 4
d) none of the mentioned
View Answer
Explanation: None.
7. If the size of logical address space is 2 to the power of m, and a page size is 2 to the power of n addressing units, then the high order _____ bits of a logical address designate the page number, and the ____ low order bits designate the page offset.
a) m, n
b) n, m
c) m – n, m
d) m – n, n
View Answer
Explanation: None.
8. With paging there is no ________ fragmentation.
a) internal
b) external
c) either type of
d) none of the mentioned
View Answer
Explanation: None.
9. The operating system maintains a ______ table that keeps track of how many frames have been allocated, how many are there, and how many are available.
a) page
b) mapping
c) frame
d) memory
View Answer
Explanation: None.
10. Paging increases the ______ time.
a) waiting
b) execution
c) context – switch
d) all of the mentioned
View Answer
Explanation: None.
11. Smaller page tables are implemented as a set of _______
a) queues
b) stacks
c) counters
d) registers
View Answer
Explanation: None.
12. The page table registers should be built with _______
a) very low speed logic
b) very high speed logic
c) a large memory space
d) none of the mentioned
View Answer
Explanation: None.
13. For larger page tables, they are kept in main memory and a __________ points to the page table.
a) page table base register
b) page table base pointer
c) page table register pointer
d) page table base
View Answer
Explanation: None.
14. For every process there is a __________
a) page table
b) copy of page table
c) pointer to page table
d) all of the mentioned
View Answer
Explanation: None.
15. Time taken in memory access through PTBR is ____________
a) extended by a factor of 3
b) extended by a factor of 2
c) slowed by a factor of 3
d) slowed by a factor of 2
View Answer
Explanation: None.
More MCQs on Paging:
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