Mechatronics Questions and Answers – Digital Logic Control

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This set of Mechatronics Multiple Choice Questions & Answers (MCQs) focuses on “Digital Logic Control”.

1. What is the output of 2 Input XNOR gate if both the inputs are same?
a) 0
b) 1
c) 10
d) 11
View Answer

Answer: b
Explanation: The output of 2 Input XNOR gate is 1 if both the inputs are same. The output of the XNOR gate is 1 if both the inputs are logic 0 or logic 1. This is why they are called as equality detector.
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2. Which gate is called as inequality detector?
a) 2 Input AND Gate
b) 2 Input NAND Gate
c) 2 Input XOR Gate
d) 2 Input XNOR Gate
View Answer

Answer: c
Explanation: A 2 Input XOR gate is called as inequality detector. They are called so because, when the two inputs of the XOR gate is different its output is Logic one (High). Whereas when both the inputs are same then the output is Logic zero (LOW). Therefore, a 2 Input XOR gate can compare 2 binary bits.

3. What is the IC (Integrated circuit) number of Quad 2 Input OR Gate?
a) 7404
b) 7402
c) 7408
d) 7432
View Answer

Answer: d
Explanation: The IC (Integrated circuit) number of Quad 2 Input OR Gate is 7432. It is also referred as 74LS32. The Quad 2 Input OR Gate package consists of 4 OR gates. It has total 14 pins including the VCC and Ground pin.
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4. What is the IC (Integrated circuit) number of Quad 2 Input XOR Gate?
a) 7404
b) 7486
c) 7408
d) 7432
View Answer

Answer: b
Explanation: The IC (Integrated circuit) number of Quad 2 Input XOR Gate is 7486. It is also referred as 74LS86. The Quad 2 Input OR Gate package consists of 4 OR gates. It has total 14 pins including the VCC and Ground pin. It is also known as inequality detector.

5. NAND gate and NOR gate are universal logic gates.
a) True
b) False
View Answer

Answer: a
Explanation: NAND gate and NOR gate are universal logic gates. These are called so because any type of basic or combinational logic gate (such as AND, OR, XOR, XNOR etc) can be made by a cluster of only NAND gates or NOR gates.
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6. The output of 2 Input AND gate is Logic 1 if any one of its input is Logic 1.
a) True
b) False
View Answer

Answer: b
Explanation: The output of 2 Input AND gate is not Logic 1 if any one of its input is Logic 1. Its output is logic 1 only when both the inputs of the AND gate is 1. The output of 2 Input OR gate is Logic 1 if any one of its input is Logic 1.

7. What is the IC (Integrated circuit) number of Quad 2 Input NAND Gate?
a) 7404
b) 7486
c) 7400
d) 7432
View Answer

Answer: c
Explanation: The IC (Integrated circuit) number of Quad 2 Input NAND Gate is 7400. The Quad 2 Input NAND Gate package consists of 4 NAND gates. It has total 14 pins including the VCC and Ground pin. It is also called as universal gate.
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8. What is the IC (Integrated circuit) number of Quad 2 Input NOR Gate?
a) 7404
b) 7402
c) 7400
d) 7432
View Answer

Answer: b
Explanation: The IC (Integrated circuit) number of Quad 2 Input NOR Gate is 7400. The Quad 2 Input NOR Gate package consists of 4 NOR gates. It has total 14 pins including the VCC and Ground pin. It is also called as universal gate.

9. What is the IC (Integrated circuit) number of Quad 2 Input XNOR Gate of TTL logic family?
a) 4077
b) 7402
c) 74266
d) 7432
View Answer

Answer: c
Explanation: The IC (Integrated circuit) number of Quad 2 Input XNOR Gate of TTL logic family is 74266. The Quad 2 Input NOR Gate package consists of 4 XNOR gates. It has total 14 pins including the VCC and Ground pin. 4077 is the IC (Integrated circuit) number of Quad 2 Input XNOR Gate of CMOS IC family.
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10. What is the IC (Integrated circuit) number of Quad 2 Input AND Gate?
a) 7404
b) 7402
c) 7408
d) 74032
View Answer

Answer: c
Explanation: The IC (Integrated circuit) number of Quad 2 Input AND Gate is 7408. It is also referred as 74LS08. The Quad 2 Input AND Gate package consists of 4 NOT gates. It has total 14 pins including the VCC and Ground pin.

11. What is the minimum number of 2 Input NAND Gate required to make a 2 Input XOR gate?
a) 2
b) 3
c) 4
d) 5
View Answer

Answer: c
Explanation: The minimum number of 2 Input NAND Gate required to make a 2 Input XOR gate is 4. This process is of making XOR gate using NAND gate is called realisation of XOR gate using NAND gate. NAND gate is a universal gate and can be used to design any logic gate.

12. XOR gate is an abbreviation of Executive OR Gate.
a) True
b) False
View Answer

Answer: b
Explanation: XOR gate is not an abbreviation of Executive OR Gate. It is abbreviation for Exclusive-OR Gate. This gate is also known as inequality detector. They are called so because, when the two inputs of the XOR gate is different its output is Logic one(High). Whereas when both the inputs are same then the output is Logic zero(LOW). Therefore, a 2 Input XOR gate can compare 2 binary bits.

13. What is the minimum number of 2 Input NOR Gates required to make a 2 Input XNOR gate?
a) 2
b) 3
c) 4
d) 5
View Answer

Answer: c
Explanation: The minimum number of 2 Input NOR Gates required to make a 2 Input XNOR gate is 4. This process of making XNOR gate using NOR gate is called realisation of XNOR gate using NOR gate. NOR gate is a universal gate and can be used to design any logic gate.

14. What is the IC (Integrated circuit) number of Hex Inverter(NOT Gate)?
a) 7404
b) 7402
c) 7408
d) 74032
View Answer

Answer: a
Explanation: The IC (Integrated circuit) number of Hex Inverter(NOT Gate) is 7404. It is also referred as 74LS04. The hex inverter package consists of 6 NOT gates. The output of NOT gate is logic 0 when the input is logic 1 and vice versa.

15. Which gate is called as equality detector?
a) 2 Input AND Gate
b) 2 Input NAND Gate
c) 2 Input XOR Gate
d) 2 Input XNOR Gate
View Answer

Answer: d
Explanation: A 2 Input XNOR gate is called as equality detector. They are called so because, when the two inputs of the XOR gate is different its output is Logic Zero(LOW), but when both the inputs are same then the output is Logic one (HIGH). Therefore, a 2 Input XNOR gate can compare 2 binary bits.

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Manish Bhojasia, a technology veteran with 20+ years @ Cisco & Wipro, is Founder and CTO at Sanfoundry. He lives in Bangalore, and focuses on development of Linux Kernel, SAN Technologies, Advanced C, Data Structures & Alogrithms. Stay connected with him at LinkedIn.

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