Demultiplexers in Digital Electronics

In this tutorial, you will learn the fundamentals of demultiplexers, including their definition, functionality, and design variations. You will also explore the differences between demultiplexers and multiplexers, understand how to design various types of DEMUXs without enable pins, and discover their applications in digital communications.

Contents:

  1. What is a Demultiplexer?
  2. Differences Between Multiplexer and Demultiplexer
  3. Designing a 1 × 2 DEMUX Without an Enable Pin
  4. 1 × 4 Demultiplexer with an Active HIGH Enable Pin
  5. Designing a 1 × 4 DEMUX Without an Enable Pin
  6. 1 × 8 DEMUX with Active LOW Enable Pin
  7. Designing a 1 × 4 DEMUX Using Lower-Order DEMUXs Without Enable Pin
  8. Designing a 1 × 8 DEMUX Using Lower-Order DEMUXs Without Enable Pin
  9. Designing a 1 × 16 DEMUX Using Lower-Order DEMUXs Without Enable Pin
  10. Applications of Demultiplexers

What is a Demultiplexer?

A demultiplexer (DEMUX) is a combinational circuit that takes a single input signal and transmits it to one of many possible output lines, depending on the value of select lines. It essentially performs a one-to-many operation, making it a data distributor. The number of output lines depends on the number of select lines, following the relationship: m ≤ 2n. Where m is the number of output lines, and n is the number of select lines.

Key Features:

  • Single input and multiple outputs.
  • The select lines determine which output receives the input signal.
  • Commonly used in data routing, communication systems, and signal distribution.

Demultiplexers as Switches
In decoders, we have one input and multiple outputs. The select lines here will represent the output. Here is a figure of a demultiplexer block.

demultiplexer block

As shown in the figure, there is one input and multiple outputs in the demux, using the select lines choice is made as to which output line, the input will go to.

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Differences Between Multiplexer and Demultiplexer

The differences between a multiplexer and a demultiplexer are listed below.

Parameters Multiplexer Demultiplexer
Input It takes multiple inputs. It takes only a single input.
Output It contains a single output line. It contains multiple output lines
Select lines Select lines are used to select an input line. Select lines are used to select an output line.
Conversion It converts parallel data into serial data. It converts serial data into parallel data.
Function
implementation
Any Boolean function can be implemented using multiplexers. Limited number of Boolean functions can be implemented using demultiplexers.

Designing a 1 × 2 DEMUX Without an Enable Pin

The following diagram explains the design of a 1 × 2 DEMUX without an enable pin.

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1 × 2 DEMUX without an Enable Pin
  • A 1 × 2 DEMUX consists of one input line I , one select line S , and two output lines Y0 and Y1.
  • If S is ‘0’ then input I get connected to the output Y0. If S is ‘1’ then input I get connected to the output Y1.
  • The truth table of the 1 × 2 DEMUX is shown below:
    S Y0 Y1
    0 I 0
    1 0 I
  • From the truth table, the output expressions Y0 and Y1 can be obtained i.e. Y0 = S’I and Y1 = SI.
  • These expressions have been implemented in the circuit diagram by using two 2-input AND gates, one NOT gate.

1 × 4 Demultiplexer with an Active HIGH Enable Pin

The following diagram explains a 1 × 4 DEMUX with an active HIGH enable pin.

1 × 4 DEMUX with an active HIGH enable pin
  • A 1 × 4 DEMUX contains one input line I and four output lines Y0, Y1, Y2 and Y3.
  • S1 and S0 are the two select bits required to select one among four output lines. S1 is the MSB and S0 is the LSB.
  • An active HIGH enable pin E is connected to the DEMUX. It means if E is LOW then the DEMUX is disabled and if E is HIGH then the DEMUX is enabled.
  • The truth table of a 1 × 4 DEMUX with an active HIGH enable pin E is shown below:
    E S1 S0 Y3 Y2 Y1 Y0
    0 X X 0 0 0 0
    1 0 0 0 0 0 I
    1 0 1 0 0 I 0
    1 1 0 0 I 0 0
    1 1 1 I 0 0 0

Designing a 1 × 4 DEMUX Without an Enable Pin

The following diagram explains the circuit design of a 1 × 4 DEMUX without an enable pin.

Designing a 1 × 4 DEMUX Without an Enable Pin
  • The 1 × 4 DEMUX circuit consists of four 3-input AND gates and two NOT gates.
  • From the circuit, if S1 and S0 both are logic ‘0’, then input I get connected to output Y0. So, Y0 = S1’S0’I.
  • If S1 is logic ‘0’ and S0 is logic ‘1’, then input I get connected to output Y1. So, Y1 = S1’S0I.
  • If S1 is logic ‘1’ and S0 is logic ‘0’, then input I get connected to output Y2. So, Y2 = S1S0’I.
  • If S1 and S0 both are logic ‘1’, then input I get connected to output Y3. So, Y3 = S1S0I.

1 × 8 DEMUX with Active LOW Enable Pin

A 1 × 8 DEMUX with an active LOW enable pin is explained in the points below.

  • A 1 × 8 DEMUX with an active LOW enable pin (E) has one input line (I) and eight output lines (Y7 to Y0).
  • It need three select bits (S2 S1 S0) to select one out of eight output lines and connect it to the input line.
  • The truth table of a 1 × 8 DEMUX with an active LOW enable pin is shown below.
    E S2 S1 S0 Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0
    1 X X X 0 0 0 0 0 0 0 0
    0 0 0 0 0 0 0 0 0 0 0 I
    0 0 0 1 0 0 0 0 0 0 I 0
    0 0 1 0 0 0 0 0 0 I 0 0
    0 0 1 1 0 0 0 0 I 0 0 0
    0 1 0 0 0 0 0 I 0 0 0 0
    0 1 0 1 0 0 I 0 0 0 0 0
    0 1 1 0 0 I 0 0 0 0 0 0
    0 1 1 1 I 0 0 0 0 0 0 0

Designing a 1 × 4 DEMUX Using Lower-Order DEMUXs Without Enable Pin

The following diagram explains the design of a 1 × 4 DEMUX using lower order DEMUXs without any enable pin.

1 × 4 DEMUX using 1 × 2 DEMUXs
  • Three 1 × 2 DEMUXs are required to design a 1 × 4 DEMUX without any enable pin.
  • Two select bits S1 and S0 are used in the circuit to connect input I to one of the four possible outputs (Y0 to Y3).
  • Select bit S1 is used to operate DEMUX1. If it is ‘0’ then input I will be connected to DEMUX2 and if it is ‘1’ then input I will be connected to DEMUX3.
  • DEMUX2 and DEMUX3 are operated by select bit S0 but their operations depend on the output produced by DEMUX1 (X0 and X1).
  • For example, if S1 and S0 both are 0s then X0 = I and X1 = 0. So, DEMUX2 will be functional to produce output Y0 i.e. Y0 = X0 = I.

Designing a 1 × 8 DEMUX Using Lower-Order DEMUXs Without Enable Pin

The following diagram explains the design of a 1 × 8 DEMUX using lower order DEMUXs without any enable pin.

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1 × 8 DEMUX using Lower Order DEMUXs
  • One 1 × 2 DEMUX and two 1 × 4 DEMUXs are required for the optimal design of a 1 × 8 DEMUX without any enable pin.
  • Three select bits S2, S1, and S0 are used in the circuit to connect input I to one of the eight possible outputs (Y0 to Y7).
  • Select bit S2 is used to operate the 1 × 2 DEMUX1. If it is ‘0’ then 1 × 4 DEMUX2 will get the input I and If it is ‘1’ then 1 × 4 DEMUX3 will get the input I .
  • 1 × 4 DEMUX2 and DEMUX3 are operated by the two select bits S1 and S0 but after the output generation of 1 × 2 DEMUX1.
  • For example, if S2 is ‘0’ then X0 = I and X1 = 0. So, DEMUX2 will get the input I . Now, for DEMUX2, if S1 is ‘0’ and S0 is ’1’ then Y1 = X0 = I.

Designing a 1 × 16 DEMUX Using Lower-Order DEMUXs Without Enable Pin

The following diagram explains the design of a 1 × 16 DEMUX using lower order DEMUXs without any enable pin.

1 × 16 DEMUX using Lower Order DEMUXs
  • One 1 × 2 DEMUX and two 1 × 8 DEMUXs are required for the optimal design of a 1 × 16 DEMUX without any enable pin.
  • At a time only one 1 × 8 DEMUX will be functional along with the 1 × 2 DEMUX to connect input I to one of the sixteen possible outputs.
  • Four select bits S3, S2, S1, and S0 are used in the circuit to connect input I to one of the sixteen possible outputs (Y0 to Y15).
  • One select bit S3 is used to operate the 1 × 2 DEMUX1 and all other select bits (S2 S1 S0) are used to operate 1 × 8 DEMUX2 and DEMUX3.

Applications of Demultiplexers

The applications of demultiplexers are explained in the points below.

  • Demultiplexers are used in digital data communication systems to receive the transmitted output signals of multiplexers.
  • In computers demultiplexers are used to connect memory chips to the processor according to their addresses.
  • Inside a microprocessor, demultiplexers are used to store the output of an Arithmetic logic unit (ALU) in registers.
  • Demultiplexers are used in wavelength routers and ATM packet broadcasting system.

Key Points to Remember

Here is the list of key points we need to remember about “Demultiplexer in Digital Electronics”.

  • A demultiplexer (DEMUX) transmits a single input signal to one of many outputs based on select lines, performing a one-to-many operation.
  • Unlike multiplexers, which combine multiple inputs into one output, demultiplexers distribute one input signal to multiple outputs, converting serial data into parallel data.
  • DEMUX designs can include enable pins; for instance, a 1 × 2 DEMUX without an enable pin connects its input to one of two outputs using a single select line.
  • More complex demultiplexers, like 1 × 8 or 1 × 16, can be built using smaller DEMUXs, demonstrating modular design in digital circuits.
  • Demultiplexers are essential in digital communication, memory addressing in computers, and microprocessor operations, highlighting their significance in technology.

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