Analog Circuits Questions and Answers – Op-Amp Characteristics

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This set of Analog Circuits Multiple Choice Questions & Answers (MCQs) focuses on “Op-Amp Characteristics”.

1. Consider the ideal op-amp shown and find the correct output.
analog-circuits-questions-answers-op-amp-characteristics-q1
a) analog-circuits-questions-answers-op-amp-characteristics-q1a
b) analog-circuits-questions-answers-op-amp-characteristics-q1b
c) analog-circuits-questions-answers-op-amp-characteristics-q1c
d) analog-circuits-questions-answers-op-amp-characteristics-q1d
View Answer

Answer: b
Explanation: For an ideal op-amp, the gain is ∞. But the output does not go to an infinite value. The output value is limited by the power supply voltages. The maximum value can be +VCC and minimum is –VEE. Hence, the maximum output is +15V.
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2. Consider a practical op-amp where the power supply is VCC = +12V and VEE = -12V. The open loop gain is 106 and open loop bandwidth is 5Hz. What is the maximum positive input before which the output is saturated?
a) 12 mV
b) 0.012 mV
c) 24 mV
d) 12V
View Answer

Answer: b
Explanation: The output is saturated at the input +VSat/AOL or –VSat/AOL.
For positive saturation, the maximum allowable input is 12/106 = 0.012 mV.

3. Given an op-amp who’s gain is unknown but the output is saturated, which of the following is not possible?
a) No feedback is being applied
b) Negative feedback is applied while input is more than –VSat/AOL
c) Positive feedback is applied
d) Negative feedback is applied while the input is more than VSat/AOL
View Answer

Answer: b
Explanation: If op-amp is used without feedback or with positive feedback, the difference voltage VD will be large enough and hence op-amp can be considered to be in the saturation region. If op-amp is used with negative feedback then the input is smaller. Saturation of output occurs if the input is not between –VSat/AOL and +VSat/AOL.

4. The current flowing into one input of the op-amp is 12nA and it is 10 nA in the other. Find the input offset current.
a) 1nA
b) 2nA
c) -2nA
d) 11nA
View Answer

Answer: b
Explanation: IIO = |IB1 – IB2|
IIO = 2nA.
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5. What is incorrect regarding the output offset voltage of op-amp?
a) It is the output when the input voltage at both input pins of op-amp is zero
b) It occurs due to dissimilarities in the internal structure of the op-amp
c) The output offset voltage does not depend on the supply voltage
d) The output offset voltage can be in the units of Volts
View Answer

Answer: c
Explanation: Output offset voltage is the output voltage of the op-amp when the input at both terminals is zero. It occurs due to the dissimilarities and mismatches in the internal structure of the op-amp. The value of output offset voltage is in volts. It varies with changes in supply voltage.

6. Given that the PSRR of an op-amp is 120dB. The supply lies between 12V to 15V. Calculate the change in the input offset voltage.
a) 3μV
b) ±3μV
c) ±3×10-12V
d) -3V
View Answer

Answer: b
Explanation: PSRR = 20log(ΔVS/ΔVIO)
ΔVIO = ±3/106 = ±3μV.

7. Consider the circuit shown.
analog-circuits-questions-answers-op-amp-characteristics-q7
The input VI = 10sin2π106t
Calculate the duty cycle of the output.
a) 0.43
b) 0.065
c) 0.36
d) 0.5
View Answer

Answer: c
Explanation: Duty cycle for a signal = Duration when output is VSat/Total period
Let input = VI = 10 sinθ
The output goes to +VSat whenever the input VI crosses amplitude of 4V.
Thus 4 = 10sinθ
Θ = sin-1 0.4 = 0.411 rad = 23.57°
The duty cycle = [180 – θ – θ]/360 = 180-47.14/360 = 0.36.
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8. An op-amp uses a level shifter internally to prevent loading effect.
a) True
b) False
View Answer

Answer: a
Explanation: A level shifter is used to eliminate the DC bias voltage present in the output of the intermediate stage which can cause distortion. Also, the level shifter has high input resistance which prevents loading effect on the intermediate stage since it is also a voltage buffer.

Sanfoundry Global Education & Learning Series – Analog Circuits.

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Manish Bhojasia, a technology veteran with 20+ years @ Cisco & Wipro, is Founder and CTO at Sanfoundry. He is Linux Kernel Developer & SAN Architect and is passionate about competency developments in these areas. He lives in Bangalore and delivers focused training sessions to IT professionals in Linux Kernel, Linux Debugging, Linux Device Drivers, Linux Networking, Linux Storage, Advanced C Programming, SAN Storage Technologies, SCSI Internals & Storage Protocols such as iSCSI & Fiber Channel. Stay connected with him @ LinkedIn