This set of VLSI Multiple Choice Questions & Answers (MCQs) focuses on “Automatic Test Pattern Generation”.
1. Automatic test pattern generator detects only the fault and not its cause.
Explanation: The test patterns generated using automatic test pattern generator is used to detect the faults and in some cases it assists in finding the cause of the failure too.
2. The automatic test pattern generator method has ____ phases
Explanation: The automatic test pattern generator method has two phases – fault activation and fault propogation phase.
3. Faults which produce same faulty behaviour are known as
a) similar faults
b) equivalent faults
c) correlative faults
d) ambigious faults
Explanation: Two or more faults may produce same faulty behaviour for all input patterns and these faults are known as equivalent faults.
4. The process of removing equivalent faults is called as
a) equivalent removing
b) bulk damaging
c) fault collapsing
d) fault reduction
Explanation: The process of removing equivalent faults from the entire set of faults is called as fault collapsing. Any single fault from the whole set of equivalent faults can represent it.
5. ‘n’ signal lines can potentially have _____ stuck-at faults
Explanation: If a circuit has n signal lines, then potentially it can have 2n stuck-at faults defined on the circuit.
6. The stuck-at model is a _____ fault model
Explanation: The stuck-at model is a logical fault model because no delay information is associated with the fault definition.
7. Stuck-at fault is an example of ______ fault model
Explanation: Stuck-at fault model is also called a permanent fault model because the faulty effect is assumed to be permanent.
8. Transient faults does not depend on operating condition.
Explanation: Transient faults occur sporadicalley depending on operating condition and on the data values on surrounding signal lines.
9. The _____ between two signal is called as bridging fault
a) open circuit
d) short circuit
Explanation: A short circuit between two signal lines is called as bridging fault and it is similar to stuck-at fault model.
10. The sum of all propogation delays along a simgle path is given as
a) gate delay fault
b) transition fault
c) path delay fault
d) propogation fault
Explanation: Path delay fault is given as the sum of all propogation faults along a single path. This fault shows that delay of one or more path exceeds clock period.
11. Which method is more complex?
a) stuck at fault
c) combinational ATPG
d) sequential ATPG
Explanation: Sequential automatic test pattern generation method is more complex and remains a complex task for large highly sequential circuits.
Sanfoundry Global Education & Learning Series – VLSI.
To practice all areas of VLSI, here is complete set of 1000+ Multiple Choice Questions and Answers.