PLC Program to Implement 8:1 Multiplexer

This is a PLC Program to Implement 8:1 Multiplexer.

Problem Description

Implementing 8:1 Multiplexer in PLC using Ladder Diagram programming language.

Problem Solution
  • There are m-data inputs, one output and n select lines, with 2m = n.
  • To select n inputs, we need m select lines such that 2m = n.
  • Depending on the output. The selection of one of the n inputs is done by the select pins.
  • It does not need K-map and simplification so one step is eliminated to create Ladder Logic Diagram.
  • Realize the multiplexer using Logic Gates.
  • Truth Table can be written as given below.
Data    Select Inputs	        Output
Inputs	S2	S1	S0      Q	
D0	0	0	0	D0
D1	0	0	1	D1
D2	0	1	0	D2
D3	0	1	1	D3
D4	1	0	0	D4
D5	1	0	1	D5
D6	1	1	0	D6
D7	1	1	1	D7

Realizing 8:1 Mux using Logic Gates
plc-program-implement-8-1-multiplexer-01

PLC Program

Here is PLC program to Implement 8:1 Multiplexer, along with program explanation and run time test cases.

List of Inputs and Outputs
 S2=		I:1/0	(Select Line Input)
 S1=		I:1/1	(Select Line Input)
 S0=		I:1/2	(Select Line Input)
 D0=		I:1/3	(Data Line Input)
 D1=		I:1/4	(Data Line Input)
 D2=		I:1/5	(Data Line Input)
 D3=		I:1/6	(Data Line Input)
 D4=		I:1/7	(Data Line Input)
 D5=		I:1/8	(Data Line Input)
 D6=		I:1/9	(Data Line Input)
 D7=		I:1/10	(Data Line Input)
 Q=		O:2/0	(Output)

Ladder Diagram to obtain output
plc-program-implement-8-1-multiplexer-02

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Program Description
  • In all the rungs, S2 (I:1/0), S1 (I:1/1) and S0 (I:1/2) are used as a selector line input as shown in Logic Circuit.
  • D0 to D7, I:1/3 to I:1/10 are Data Inputs respectively.
  • When S2 (I:1/0), S1 (I:1/1) and S0 (I:1/2) are low, output will have whatever state D0 I:1/3 holds, either 1 or 0.
  • When S2 (I:1/0) and S1 (I:1/1) are low and S0 (I:1/1) is high, output will have whatever state D1 I:1/4 holds.
  • Similarly remaining six different inputs are performed.
  • In other words, according to bit pattern of S2, S1 and S0, Data bits from D0 to D7 are passed to output.
  • Here, instead of bits D0 to D7, any functions such as moving, jumping or moving can be performed as well depending upon the application.
Runtime Test Cases
Data	        Select Inputs	           Output
Inputs       S2(I:1/0) S1(I:1/1) S0(I:1/2)  Q(O:2/0)	
D0 (I:1/3)	0	  0	    0	   D0 0 or 1
D1 (I:1/4)	0	  0	    1      D1 0 or 1
D2 (I:1/5)	0	  1	    0	   D2 0 or 1
D3 (I:1/6)	0	  1	    1	   D3 0 or 1
D4 (I:1/7)	1	  0	    0	   D4 0 or 1
D5 (I:1/8)	1	  0	    1	   D5 0 or 1
D6 (I:1/9)	1	  1	    0	   D6 0 or 1
D7 (I:1/10)	1	  1	    1	   D7 0 or 1

Sanfoundry Global Education & Learning Series – PLC Algorithms.
To practice all PLC programs, here is complete set of 100+ PLC Problems and Solutions.

If you find any mistake above, kindly email to [email protected]

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Manish Bhojasia, a technology veteran with 20+ years @ Cisco & Wipro, is Founder and CTO at Sanfoundry. He lives in Bangalore, and focuses on development of Linux Kernel, SAN Technologies, Advanced C, Data Structures & Alogrithms. Stay connected with him at LinkedIn.

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