This is a PLC Program to Implement 4:1 Multiplexer.
Implementing 4:1 multiplexer in PLC using Ladder Diagram programming language.
- There are m-data inputs, one output and n select lines, with 2m = n.
- To select n inputs, we need m select lines such that 2m = n. Depending on the output. The selection of one of the n inputs is done by the select pins.
- It does not need K-map and simplification so one step is eliminated to create Ladder Logic Diagram.
- Realize the multiplexer using Logic Gates.
- Truth Table can be written as given below.
Data Select Inputs Output Inputs S1 S0 Q D0 0 0 D0 D1 0 1 D1 D2 1 0 D2 D3 1 1 D3
Here is PLC program to Implement 4:1 Multiplexer, along with program explanation and run time test cases.
List of Inputs and Outputs S1= I:1/0 (Select Line Input) S0= I:1/1 (Select Line Input) D0= I:1/2 (Data Line Input) D1= I:1/3 (Data Line Input) D2= I:1/4 (Data Line Input) D3= I:1/5 (Data Line Input) Q= O:2/0 (Output)
- In all the rungs, S1 (I:1/0) and S0 (I:1/1) are used as a selector line input as shown in Logic Circuit.
- D0, D1, D2 and D3, I:1/2, I:1/3, I:1/4 and I:1/5 are Data Inputs respectively.
- When S1 (I:1/0) and S0 (I:1/1) are low, output will have whatever state D0 I:1/2 holds, either 1 or 0.
- When S1 (I:1/0) is low and S0 (I:1/1) is high, output will have whatever state D1 I:1/3 holds.
- Similarly remaining two different inputs are performed.
- In other words, according to bit pattern of S1 and S0, Data bits D0 to D3 are passed to output.
- Here, instead of bits D0 to D3, any functions such as moving, jumping or moving can be performed as well depending upon the application.
Data Select Inputs Output Inputs S1 S0 Q D0-0/1 0 0 D0-0/1 D1-0/1 0 1 D1-0/1 D2-0/1 1 0 D2-0/1 D3-0/1 1 1 D3-0/1
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