This set of Linear Integrated Circuit Multiple Choice Questions & Answers (MCQs) focuses on “Operational Amplifier Internal Circuit – 1”.
1. Which is not the internal circuit of operational amplifier?
a) Differential amplifier
b) Level translator
c) Output driver
Explanation: Clamper is an external circuit connected at the output of Operational amplifier, which clamp the output to desire DC level.
2. The purpose of level shifter in Op-amp internal circuit is to
a) Adjust DC voltage
b) Increase impedance
c) Provide high gain
d) Decrease input resistance
Explanation: The gain stages in Op-amp are direct coupled. So, level shifter is used for adjustment of DC level.
3. How a symmetrical swing is obtained at the output of Op-amp
a) Providing amplifier with negative supply voltage
b) Providing amplifier with positive voltage
c) Providing amplifier with positive& negative voltage
d) None of the mentioned
Explanation: For example, consider a single voltage supply +15v. During positive half cycle the output will be +5v and -10v during negative half cycle.
Therefore, the maximum peak to peak output swing, -5v (-10v) = -15v (Asymmetrical swing).
So, to get symmetrical swing both positive and negative supply voltage with bias point fixed suitably is required.
4. What is the purpose of differential amplifier stage in internal circuit of Op-amp?
a) Low gain to differential mode signal
b) Cancel difference mode signal
c) Low gain to common mode signal
d) Cancel common mode signal
Explanation: Any undesired noise, common to both of the input terminal is suppressed by differential amplifier.
5. Which of the following is not preferred for input stage of Op-amp?
a) Dual Input Balanced Output
b) Differential Input Single ended Output
c) Cascaded DC amplifier
d) Single Input Differential Output
Explanation: Cascaded DC amplifier suffers from major problem of drift of the operating point, due to temperature dependency of the transistor.
6. What will be the emitter current in a differential amplifier, where both the transistor are biased and matched? (Assume current to be IQ)
a) IE = IQ/2
b) IE = IQ
c) IE = (IQ)2/2
d) IE = (IQ)2
Explanation: Due to symmetry of differential amplifier circuit, current IQ divides equally through both transistors.
Explanation: The voltage at the common emitter ‘E’ will be -0.7v, which make Q1 off and the entire current will flow through Q2.
⇒ VO1 = VCC VO2= VCC-αF×IQ×RC,
⇒ VO1 = 12v , VO2=12v-1×3mA×2.7k = 3.9v.
8. At what condition differential amplifier function as a switch
a) 4VT < Vd < -4VT
b) -2VT ≤ Vd ≤ 2VT
c) 0 ≤ Vd < -4VT
d) 0 ≤ Vd ≤ 2VT
Explanation: For Vd > 4VT, the output voltage are VO1 = VCC, VO2= VCC-αF IQRC. Therefore, a transistor Q1 will be ON and Q2 will be OFF. Similarly for Vd> -4VT, both transistors Q2 & Q1 will be ON.
9. For Vd > ±4VT, the function of differential amplifier will be
c) Automatic gain control
d) Linear Amplifier
Explanation: At this condition, input voltage of the amplifier is greater than ±100mv and thus acts as a limiter.
10. Change in value of common mode input signal in differential pair amplifier make
a) Change in voltage across collector
b) Slight change in collector voltage
c) Collector voltage decreases to zero
d) None of the mentioned
Explanation: In differential amplifier due to symmetry, both transistors are biased and matched. Therefore, Voltage at each collector will be same.
Explanation: Collector current, IC2=αF×IQ/(1+eVd⁄VT),
VT = Volts equivalent of temperature = 25mv,
⇒ Vd = V1-V2 =2.078v-2.06v=0.018v (equ1)
Substituting equation 1,
⇒ Vd/VT = 0.018v/25mv = 0.72v (equ2)
Substituting equation 2,
⇒ IC2= 1×2.4mA/(1+e0.72) = 2.4mA/(1+2.05) = 0.8mA.
12. A differential amplifier has a transistor with β0= 100, is biased at ICQ = 0.48mA. Determine the value of CMRR and ACM, if RE =7.89kΩ and RC = 5kΩ.
a) 49.54 db
b) 49.65 d
c) 49.77 db
d) 49.60 db
Explanation: Differential mode gain, ADM= -gmRC and Common mode gain,
⇒ ACM= -(gmRC)/(1+2gmRE)
Substituting the values,
⇒ gm= ICQ/VT = 0.48mA/25mv=19.2×10-3Ω-1
⇒ ADM= -gm×RC= -19.2×10-3Ω-1×5kΩ= -96
⇒ ACM= -(gmRC)/(1+2gmRE)= -(19.2×10-3Ω-1×5kΩ) /(1+2×-⇒ 19.2×10-3Ω-1×7.89kΩ) = -0.3158
CMRR = -96/-0.3158= 303.976
Sanfoundry Global Education & Learning Series – Linear Integrated Circuits.
To practice all areas of Linear Integrated Circuits, here is complete set of 1000+ Multiple Choice Questions and Answers.