Computer Organization and Architecture MCQ (Multiple Choice Questions)

Here are 1000 Computer Organization and Architecture MCQ (Chapterwise).

1. What is computer architecture?
a) set of categories and methods that specify the functioning, organisation, and implementation of computer systems
b) set of principles and methods that specify the functioning, organisation, and implementation of computer systems
c) set of functions and methods that specify the functioning, organisation, and implementation of computer systems
d) None of the mentioned
View Answer

Answer: b
Explanation: A set of principles and methods that specify the functioning, organisation, and implementation of computer systems is known as computer architecture. A system’s architecture refers to its structure in terms of the system’s individually specified components and their interrelationships.

2. What is computer organization?
a) structure and behaviour of a computer system as observed by the user
b) structure of a computer system as observed by the developer
c) structure and behaviour of a computer system as observed by the developer
d) All of the mentioned
View Answer

Answer: a
Explanation: The structure and behaviour of a computer system as observed by the user is the subject of computer organisation.

3. Which of the following is a type of computer architecture?
a) Microarchitecture
b) Harvard Architecture
c) Von-Neumann Architecture
d) All of the mentioned
View Answer

Answer: d
Explanation: Below are the types of Computer Architecture:
i) Von-Neumann Architecture
ii) Harvard Architecture
iii) Instruction Set Architecture
iv) Microarchitecture
v) System Design

4. Which of the following is a type of architecture used in the computers nowadays?
a) Microarchitecture
b) Harvard Architecture
c) Von-Neumann Architecture
d) System Design
View Answer

Answer: c
Explanation: John von Neumann proposed this architecture. The architecture of today’s computers is based on von Neumann architecture. It is based on a few ideas.

5. Which of the following is the subcategories of computer architecture?
a) Microarchitecture
b) Instruction set architecture
c) Systems design
d) All of the mentioned
View Answer

Answer: d
Explanation: The three main subcategories of computer architecture are:
i) Microarchitecture
ii) Instruction set architecture
iii) Systems design

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6. Which of the architecture is power efficient?
a) RISC
b) ISA
c) IANA
d) CISC
View Answer

Answer: a
Explanation: Hence the RISC architecture is followed in the design of mobile devices.

7. What does CSA stands for?
a) Computer Service Architecture
b) Computer Speed Addition
c) Carry Save Addition
d) None of the mentioned
View Answer

Answer: b
Explanation: The CSA is used to speed up the addition of multiplicands.

8. If an exception is raised and the succeeding instructions are executed completely, then the processor is said to have ______
a) Generation word
b) Exception handling
c) Imprecise exceptions
d) None of the mentioned
View Answer

Answer: c
Explanation: The processor since as executed the following instructions even though an exception was raised, hence the exception is treated as imprecise.

9. To reduce the memory access time we generally make use of ______
a) SDRAM’s
b) Heaps
c) Cache’s
d) Higher capacity RAM’s
View Answer

Answer: c
Explanation: The time required to access a part of the memory for data retrieval.

10. The IA-32 system follows which of the following design?
a) CISC
b) SIMD
c) RISC
d) None of the mentioned
View Answer

Answer: a
Explanation: This system architecture is used to reduce the steps involved in execution by performing complex operations in one step.

11. Which of the following architecture is suitable for a wide range of data types?
a) IA-32
b) ARM
c) ASUS firebird
d) 68000
View Answer

Answer: a
Explanation: IA-32 architecture is suitable for a wide range of data types.

12. In IA-32 architecture along with the general flags, which of the following conditional flags are provided?
a) TF
b) IOPL
c) IF
d) All of the mentioned
View Answer

Answer: d
Explanation: These flags are basically used to check the system for exceptions.

13. The VLIW architecture follows _____ approach to achieve parallelism.
a) SISD
b) MIMD
c) MISD
d) SIMD
View Answer

Answer: b
Explanation: The MIMD stands for Multiple Instructions Multiple Data.

14. What does VLIW stands for?
a) Very Long Instruction Width
b) Very Large Instruction Word
c) Very Long Instruction Width
d) Very Long Instruction Word
View Answer

Answer: d
Explanation: It is the architecture designed to perform multiple operations in parallel.
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15. In CISC architecture most of the complex instructions are stored in _____
a) CMOS
b) Register
c) Transistors
d) Diodes
View Answer

Answer: c
Explanation: In CISC architecture more emphasis is given on the instruction set and the instructions take over a cycle to complete.

16. Both the CISC and RISC architectures have been developed to reduce the ______
a) Time delay
b) Semantic gap
c) Cost
d) All of the mentioned
View Answer

Answer: b
Explanation: The semantic gap is the gap between the high level language and the low level language.

17. ________ are the different type/s of generating control signals.
a) Hardwired
b) Micro-instruction
c) Micro-programmed
d) Both Micro-programmed and Hardwired
View Answer

Answer: d
Explanation: The above is used to generate control signals in different types of system architectures.

18. If the instruction Add R1, R2, R3 is executed in a system which is pipelined, then the value of S is (Where S is term of the Basic performance equation).
a) 2
b) ~1
c) ~7
d) 2
View Answer

Answer: b
Explanation: The value will be much lower in case of multiple BUS organisation.

19. The small extremely fast, RAM’s all called as ________
a) Heaps
b) Accumulators
c) Stacks
d) Cache
View Answer

Answer: d
Explanation: Cache’s are extremely essential in single BUS organisation to achieve fast operation.

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20. For a given FINITE number of instructions to be executed, which architecture of the processor provides for a faster execution?
a) ANSA
b) Super-scalar
c) ISA
d) All of the mentioned
View Answer

Answer: b
Explanation: In super-scalar architecture, the instructions are set in groups and they’re decoded and executed together reducing the amount of time required to process them.

21. What is the full form of ISA?
a) Industry Standard Architecture
b) International Standard Architecture
c) International American Standard
d) None of the mentioned
View Answer

Answer: c
Explanation: The ISA is an architectural standard developed by IBM for its PC’s.

22. Which of the following is the fullform of CISC?
a) Complex Instruction Sequential Compilation
b) Complete Instruction Sequential Compilation
c) Computer Integrated Sequential Compiler
d) Complex Instruction Set Computer
View Answer

Answer: d
Explanation: The CISC machines are well adept at handling multiple BUS organisation.

23. The reason for the cells to lose their state over time is ________
a) Use of Shift registers
b) The lower voltage levels
c) Usage of capacitors to store the charge
d) None of the mentioned
View Answer

Answer: c
Explanation: Since capacitors are used the charge dissipates over time.

24. In order to read multiple bytes of a row at the same time, we make use of ______
a) Memory extension
b) Cache
c) Shift register
d) Latch
View Answer

Answer: d
Explanation: The latch makes it easy to ready multiple bytes of data of the same row simultaneously by just giving the consecutive column address.

25. The difference in the address and data connection between DRAM’s and SDRAM’s is _______
a) The requirement of more address lines in SDRAM’s
b) The usage of a buffer in SDRAM’s
c) The usage of more number of pins in SDRAM’s
d) None of the mentioned
View Answer

Answer: b
Explanation: The SDRAM uses buffered storage of address and data.

26. The chip can be disabled or cut off from an external connection using ______
a) ACPT
b) RESET
c) LOCK
d) Chip select
View Answer

Answer: d
Explanation: The chip gets enabled if the CS is set otherwise the chip gets disabled.

27. The controller multiplexes the addresses after getting the _____ signal.
a) INTR
b) ACK
c) RESET
d) Request
View Answer

Answer: d
Explanation: The controller gets the request from the device needing the memory read or write operation and then it multiplexes the address.

28. The data is transferred over the RAMBUS as _______
a) Blocks
b) Swing voltages
c) Bits
d) Packets
View Answer

Answer: b
Explanation: By using voltage swings to transfer data, the transfer rate along with efficiency is improved.

29. The memory devices which are similar to EEPROM but differ in the cost effectiveness is ______
a) CMOS
b) Memory sticks
c) Blue-ray devices
d) Flash memory
View Answer

Answer: d
Explanation: The flash memory functions similar to the EEPROM but is much cheaper.

30. The flash memory modules designed to replace the functioning of a hard disk is ______
a) RIMM
b) FIMM
c) Flash drives
d) DIMM
View Answer

Answer: c
Explanation: The flash drives have been developed to provide faster operation but with lesser space.

31. The drawback of building a large memory with DRAM is ______________
a) The Slow speed of operation
b) The large cost factor
c) The inefficient memory organisation
d) All of the mentioned
View Answer

Answer: a
Explanation: The DRAM’s were used for large memory modules for a long time until a substitute was found.

32. In a 4M-bit chip organisation has a total of 19 external connections, then it has _______ address if 8 data lines are there.
a) 2
b) 5
c) 9
d) 8
View Answer

Answer: c
Explanation: To have 8 data lines and 19 external connections it has to have 9 address lines(i.e 512 x 8 organisation).

33. What does ISO stands for?
a) International Software Organisation
b) Industrial Software Organisation
c) International Standards Organisation
d) Industrial Standards Organisation
View Answer

Answer: c
Explanation: The ISO is yet another architectural standard, used to design systems.

34. The bit used to signify that the cache location is updated is ________
a) Flag bit
b) Reference bit
c) Update bit
d) Dirty bit
View Answer

Answer: d
Explanation: When the cache location is updated in order to signal to the processor this bit is used.

35. During a write operation if the required block is not present in the cache then ______ occurs.
a) Write miss
b) Write latency
c) Write hit
d) Write delay
View Answer

Answer: a
Explanation: This indicates that the operation has missed and it brings the required block into the cache.

36. While using the direct mapping technique, in a 16 bit system the higher order 5 bits are used for ________
a) Id
b) Word
c) Tag
d) Block
View Answer

Answer: c
Explanation: The tag is used to identify the block mapped onto one particular cache block.

37. The bit used to indicate whether the block was recently used or not is _______
a) Reference bit
b) Dirty bit
c) Control bit
d) Idol bit
View Answer

Answer: b
Explanation: The dirty bit is used to show that the block was recently modified and for a replacement algorithm.

38. The number successful accesses to memory stated as a fraction is called as _____
a) Access rate
b) Success rate
c) Hit rate
d) Miss rate
View Answer

Answer: c
Explanation: The hit rate is an important factor in performance measurement.


Chapterwise Multiple Choice Questions on Computer Organization and Architecture

Computer Organization and Architecture MCQ - Multiple Choice Questions and Answers

Our 1000+ MCQs focus on all topics of the Computer Organization and Architecture subject, covering 100+ topics. This will help you to prepare for exams, contests, online tests, quizzes, viva-voce, interviews, and certifications. You can practice these MCQs chapter by chapter starting from the 1st chapter or you can jump to any chapter of your choice.
  1. Basic Structures of Computers
  2. Machine Instructions and Programs
  3. Input/Output Organisation
  4. Memory System
  5. Arithmetic
  6. Pipelining
  7. Processor Families

1. Computer Organization and Architecture MCQ on Basic Structures of Computers

The section contains Computer Organization and Architecture multiple choice questions and answers on basic structural units of a computer which include system performance, different types of bus structures and units of a computer.

  • Functional Units of a Computer
  • Basic Operational Concept
  • BUS Structure
  • Performance of a System
  • 2. Computer Architecture Multiple Choice Questions on Machine Instructions and Programs

    The section contains Computer Architecture questions and answers on various numbers and their operations, instructions and their sequencing, memory locations, stacks, passing of parameters and assembly language.

  • Addressing Modes
  • Numbers and Arithmetic Operations
  • Memory Locations and Addresses
  • Memory Operations and Management
  • Instructions & Instruction Sequencing
  • Assembly Language
  • Subroutines and Nesting
  • Parameter Passing and Stack Frame
  • 3. Computer Architecture MCQ on Input/Output Organisation

    The section contains Computer Organization and Architecture MCQs on arbitration of a BUS, Exceptions and Interrupts, Serial and Parallel ports, PCI family, SCSI family and USB family.

  • Accessing I/O Devices
  • Interrupts – 1
  • Interrupts – 2
  • Exceptions
  • Direct Memory Access
  • Bus Arbitration
  • Synchronous BUS
  • Asynchronous BUS
  • Interface Circuits
  • Standard I/O Interfaces
  • Parallel Port
  • Serial Port
  • PCI BUS-1
  • PCI BUS-2
  • SCSI BUS-1
  • SCSI BUS-2
  • USB-1
  • USB-2
  • 4. Computer Architecture Multiple Choice Questions on Memory System

    The section contains Computer Architecture multiple choice questions and answers on various different types of memories like Static, RamBus and Virtual, DRAMs, Caches, Secondary Storage and various bus organizations.

  • Static Memories
  • Asynchronous DRAM
  • Synchronous DRAM
  • Large Memories
  • RamBus Memory
  • Read-Only Memory
  • Hierarchy of Memory
  • Caches
  • Mapping Functions
  • Cache Miss and Hit
  • Single BUS Organisation-1
  • Single BUS Organisation-2
  • Multiple BUS Organisation
  • Hardwired Control
  • Micro-programmed Control
  • Replacement Algorithms
  • Performance of Caches
  • Virtual Memory
  • Secondary Storage-1
  • Secondary Storage-2
  • 5. Computer Architecture Multiple Choice Questions on Arithmetic

    The section Computer Architecture contains questions and answers on Adders, Pipelining, RISC and CISC Processors and other number representations.

  • Fast Adders
  • Multiplication
  • Representation of Floating Number
  • Pipelining
  • Superscalar Processors
  • CISC and RISC Processors
  • 6. Computer Architecture MCQ on Pipelining

    The section contains Computer Organization and Architecture MCQs on Architecture Hazards and Clusters.

  • Hazards of Processor Architecture
  • Clusters
  • VLIW Architecture (I-64)
  • 7. Computer Architecture Multiple Choice Questions on Processor Families

    The section contains Computer Organization and Architecture on multiple choice questions and answers on different types of different processor-architectures. These include Intel, Motorola and ARM.

  • Address Translation-1
  • Address Translation-2
  • Motorola 680X0 Processor architecture-1
  • Motorola 680X0 Processor architecture-2
  • ARM architecture-1
  • ARM architecture-2
  • Intel IA-32 Pentium Architecture-1
  • Intel IA-32 Pentium Architecture-2
  • If you would like to learn "Computer Organization & Architecture" thoroughly, you should attempt to work on the complete set of 1000+ MCQs - multiple choice questions and answers mentioned above. It will immensely help anyone trying to crack an exam or an interview.

    Wish you the best in your endeavor to learn and master Computer Organization & Architecture!

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